Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1991-12-10
1994-04-12
Fleming, Michael R.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307201, 364807, G06G 712, H03K 1921
Patent
active
053033299
ABSTRACT:
A continuous weight-update device for a synaptic element including at least one MOS transistor comprises a floating node having a capacitance associated therewith, the floating gate comprising at least a part of the floating node, first and second input lines, first and second error lines, an electron tunneling structure coupled to the floating node for tunneling electrons from the floating node, and an electron injecting structure coupled to the floating node for injecting electrons onto the floating node. Control circuitry is responsive to signals on the first input and error lines, for activating the electron tunneling structure, and control circuitry is responsive to signals on the second input and error lines, for activating the electron injecting structure. Circuitry is provided for driving signals onto the first and second input and error lines. Both a single synapse and an array of synapses incorporating the continuous weight-update device are also taught.
REFERENCES:
patent: 4950917 (1990-08-01), Holler et al.
patent: 4953928 (1990-09-01), Anderson et al.
patent: 4961002 (1990-10-01), Tam et al.
patent: 5028810 (1991-07-01), Castro et al.
patent: 5056037 (1991-10-01), Eberhardt
patent: 5059920 (1991-10-01), Anderson et al.
patent: 5065040 (1991-11-01), Peterson et al.
patent: 5087583 (1992-02-01), Hazani
patent: 5087826 (1992-02-01), Holler et al.
patent: 5120996 (1992-06-01), Mead et al.
patent: 5136177 (1992-08-01), Castro
patent: 5150450 (1992-09-01), Swenson et al.
Holler et al., "An Electronically Trainable Artificial Neural Network (ETANN) with 10240 Floating Gate synapses", IJCNN-89, Jun. 1989, II-191 to II-196.
Naruke et al., "A New Flash-Erase EEPROM Cell with a sidewall select gate on its source side," Intl. Electron Devices Meeting 1989, Dec. 1989, 25.7.1-25.7.4.
Chintrakulchai et al., "A Wide-Dynamic-Range Programmable Synapse for Impulse Neural Networks", 1990 IEEE Intl. Symposium on Circuits and Systems, May 1990, 2975-2977.
Lee et al., "Analog Floating-Gate Synapses for General-Purpose VLSI Neural Computation," IEEE Trans. on Circuits and Systems, Jun. 1991, 654-658.
Cauwenberghs et al., "An Adaptive CMOS Matrix-Vector Multiplier for Large Scale Analog Hardware Neural Network Applications," IJCNN-91, Jul. 1991, I-507 to I-511.
Shimabukuro et al., "A Neural Network Synapse Cell in 90 nm SOS," 1991 IEEE SOI Conf. Proceedings, Oct. 1991, 162-163.
Anderson Janeen D. W.
Mead Carver A.
Platt John C.
Doans Robert W.
Fleming Michael R.
Synaptics Incorporated
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