Continued processing of out-of-order non-architectual operations

Details Continued processing of out-of-order non-architectual operations Continued processing of out-of-order non-architectual operations

1997-09-30

2000-02-01

Kim, Kenneth S.

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

Commitment control or register bypass

712 23, 712244, G06F 938

Patent

active

060214864

ABSTRACT:
A data processing device having an apparatus to execute operations out-of-order. The apparatus having an execution unit to execute the set of operations out-of-order. The execution unit, upon executing an operation that generates a first exception, continues to execute operations out-of-order, to avoid deadlock, until an operation of a first type is to be executed. The execution unit flushes a pipeline once the operation of the first type is to be executed.

REFERENCES:
patent: 5193158 (1993-03-01), Kinney et al.
patent: 5655096 (1997-08-01), Branigin
patent: 5664138 (1997-09-01), Yoshida
patent: 5784606 (1998-07-01), Hoy et al.
patent: 5805849 (1998-09-01), Jordan et al.
patent: 5850533 (1998-12-01), Panwar et al.

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