Static information storage and retrieval – Associative memories – Ferroelectric cell
Reexamination Certificate
2002-03-27
2003-12-30
Elms, Richard (Department: 2824)
Static information storage and retrieval
Associative memories
Ferroelectric cell
C365S154000, C365S149000
Reexamination Certificate
active
06671197
ABSTRACT:
The present invention relates to a memory device for storing data in a computer, digital signal processor or such like and, in particular, to the structure of memory cells of which the memory device is comprised.
Data is generally stored by memory devices of computers, digital signal processors and such like in a binary data, i.e. as 0s and 1s. These binary digits (bits) are represented in various ways according to the type of memory device in which it is stored.
Signals in computers, digital signal processors or such like generally represent data as high and low voltages, e.g. bit
1
is represented by a HIGH voltage and bit
0
is represented by a LOW voltage. In particular, a voltage above a particular threshold may be considered as HIGH and to represent bit
1
and a voltage of 0V or below a particular threshold may be considered as LOW or to represent bit
0
. Similarly, certain memory devices store binary data electronically, e.g. as high and low charges, whereas other memory devices, such as HDDs (Hard Disk Drives) or CD-ROMs (Compact Disk—Read Only Memories) store binary data magnetically or optically.
This invention concerns memory devices which represent data electronically. One such type of memory is a RAM (Random Access Memory), which is widely used in personal computers as well as many other electronic devices. RAMs store data electronically, generally for as long as power is provided to the RAM. They generally comprise an array of transistors or capacitors formed as a semiconductor device, i.e. as a microchip formed from layers of semiconducting materials on a silicone substrate.
Some RAMs, known as DRAMs (Dynamic Random Access Memories), store electrical charges on the gates of transistors or capacitors, which charges represent binary data. Other RAMs, known as SRAMs (Static Random Access Memories), have transistors arranged effectively as switches, the state of which is representative of the stored data.
RAMs generally comprise an array of memory cells, each of which can store one bit, i.e. 0 or 1. The array of cells is generally arranged in columns and rows. Each column may be connected to a pair of data lines or “bit lines” that can apply voltages representing data to a column of cells and which are also connected to a detection device known as a “sense amplifier”. Similarly, each row of cells may be connected to a read/write line or “word line” for activating a row of cells. Data can be written to a cell by providing voltages representing the data to be stored on the data lines of the column of a cell and activating the cell with the appropriate read/write line. Similarly, data can be read from a cell by activating the cell with the appropriate read/write line and the sense amplifier sensing any voltage generated on the data lines of the cell's column.
Each memory cell has a unique address in the array and a control structure of the RAM can selectively control the writing of data to or the reading of data from the different cells in the array using the cells' addresses. Particular control strategies can be used to decide to which cells data should be written. In order to read data from the RAM it is necessary for the address of cells to which the data has been written to be known by or provided to the control structure. This is not straightforward and it is largely the data processing required for locating or “addressing” memory cells for reading and writing that limits the speed of conventional RAMs.
In order to alleviate the problems of such addressing systems, it is possible to arrange electronic memories in different ways. In particular, a memory device known as a CAM (Content Addressable Memory) implements what is known a “associative processing” to improve the speed with which data stored in an electronic memory can be used. CAMs hate structures very similar to those of RAMs, but additionally allow all of the memory cells of the CAM to be searched for a given piece of data in a single operation. CAMs are therefore sometimes described as SIMD (Single Instruction Multiple Data) type electronic devices.
CAMs are useful as memory devices for particular types of application. For example, where it is desired to frequently compare data to a reference or “look-up” table, the reference data may be stored in the CAM and the entire table searched for the given data in a single operation. This might be useful in certain types of data routing operations, image processing or database searching.
CAMs generally comprise memory cells arranged in an array and have data lines and read/write lines arranged in a similar way to those of a RAM. Additionally, special detection lines known as match lines may be connected to the rows of memory cells, the cells being arranged to discharge to the match lines according to whether or not data applied to the respective data lines matches the data stored in the cells.
Memory cells of CAMs are generally similar to memory cells of RAMs, although additional circuits are required to connect the memory cells of CAMs with the match lines. In the same way as for RAMs, CAMs may be described as Static CAMs or Dynamic CAMs depending on the structure of their memory cells. Static CAMs have memory cells comprising transistors effectively arranged as a switch, or in other words as a latch or flip flop. Once a data bit has been written to a Static CAM cell, the state of the cell will remain unchanged until it is specifically altered or until power is removed from the device. Dynamic RAMs have memory cells generally formed of fewer transistors and which store data as a charge on a capacitor or the gate of a transistor. Each memory cell of a Dynamic CAM must be periodically recharged or “refreshed” to retain its charge and hence the stored data.
In more detail, a conventional static CAM comprises an array of static CAM cells, one of which cells is shown in FIG.
1
. The cells are connected in columns to pairs of data lines DS
1
, DS
0
and in rows to read/write lines RW and match lines M. Transistors T
3
, T
4
, T
5
and T
6
are connected so as to form two cross-coupled inverters connected between power supply VDD and ground VSS, each side of the input/output connection of the cross-coupled inverters respectively forming node A and node B. The gates of read/write transistors T
1
and T
2
are connected to the read/write line RW such that they are activated when a voltage is applied to the read/write line RW. The gates of node transistors T
7
and T
8
are connected to node A and node B respectively such that they are activated when the node to which they are connected is has a voltage applied to it. When the transistors T
7
or T
8
are activated, match transistor T
9
can be activated by a voltage on a data line DS
1
, DS
0
to connect match line M to ground such that it discharges.
Data is stored in the static CAM cell as the particular state of the cross coupled inverters and hence as particular voltages on nodes A and B. Node A being HIGH and node B being LOW corresponds with binary digit 1. Node A being LOW and node B being HIGH corresponds with binary digit 0. In order to write data to the static CAM cell, voltages corresponding to the respective voltages desired on nodes A and B to represent the desired binary digit are applied to data lines DS
1
, DS
0
and the read/write transistors T
1
, T
2
are activated by read/write line RW. Thus, in order to write binary digit 1 to the memory cell, data line DS
1
is charged HIGH and data line DS
0
is charged LOW. Likewise, in order to write binary digit 0 to the memory cell, data line DS
1
is charged LOW and data line DS
0
is charged HIGH.
After the appropriate voltages have been applied to nodes A and B, the read/write transistors T
1
, T
2
are deactivated by read/write line RW. The data is stored in the cell as the cross coupled inverters retain their state and nodes A and B retain their applied voltages unless power VDD is removed. It is this feature of the static CAM cell which gives rise to the term “static”.
Data can be read from the static CAM cell by applying voltage VDD to da
Hur Jung H.
Klarquist & Sparkman, LLP
Mentor Graphics Corporation
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