Contents-addressable memory

Details Contents-addressable memory Contents-addressable memory

1997-03-07

1999-02-09

Le, Vu A.

Static information storage and retrieval

Associative memories

Ferroelectric cell

36523003, 3652385, G11C 700

Patent

active

058703241

DESCRIPTION:

BRIEF SUMMARY
The invention relates to a contents-addressable memory (CAM) in accordance with the general concept of Patent Claim 1.
Contents-addressable memories-hereinafter abbreviated as CAM--have many applications in the present state of the art in electronic circuits, especially in computer systems. Unlike a typical memory module, addressing of a memory cell in a CAM does not occur through its address. Instead, a data word is entered into a CAM which does not represent an address, but rather the possible contents of a memory location in the CAM. If there is a memory location in the CAM in which the entered data word is stored, then the CAM delivers a corresponding signal. Examples for different embodiments of CAMs and their application may be found in
It is therefore the object of the invention to create an improved CAM. It is especially the objective of the invention to make a CAM available which has a lower accessing time.
The object of the invention is achieved through the features of the characterizing section of Claim 1. In accordance thereto, the logical memory arrays of a CAM are not identical with the physical memory arrays of the CAM as they are integrated on the surface of the chip. Instead, the logical memory arrays are logically distributed in blocks. Each block of a logical memory array is integrated with the corresponding blocks of other memory arrays into a physical memory array. Through this, it is possible to minimize not only the line lengths of the signal connections of the CAM but also of the internal signal lines of the CAM, and as a result to increase processing speed.
Preferred embodiments of the CAM in accordance with the invention may be found in the sub-Claims.
An embodiment of the invention is represented in the drawings and is described here in more detail.
Depicted are
FIG. 1 a CAM according to the current state of the art;
FIG. 2 a schematic diagram representation of a CAM in accordance with the invention;
FIG. 3 a memory array consisting of 2 logical blocks of a CAM in accordance with the invention;
FIG. 4 the circuit of a memory cell and the signal lines belonging thereto;
FIG. 5 the logical connection of two match lines;
FIG. 6 in a schematic representation, the correspondence of logical memory arrays and physical memory arrays in a CAM in accordance with the invention with 3 logical memory arrays which are respectively divided into 3 blocks.
The CAM represented in FIG. 1, which is known in the current state of the art, is divided into the two memory arrays D0 and D1. The memory arrays D0 and D1 are essentially identical; the memory arrays D0 and D1 each have 128 memory locations, whereby each memory location can store a data word with a length of 24 bits. The memory arrays D0 and D1 are each electrically linked with the input lines B0-B23. The input lines B0-B23 serve for transfer of written data with word lengths of 24 bits. Furthermore, the memory array D0 has a signal input WRITE 1, and the memory array D1 has a signal input WRITE 3. If a data word which is transferred to the CAM through the input lines B0-B23 has been written into the CAM, then the signal inputs WRITE 1 and WRITE 3 serve to determine in which of the memory arrays D0 or D1 the data word shall be stored.
The memory arrays D0 and D1 are each electrically linked with the compare lines CD0-CD23. A 24-bit wide data word may be transferred to the CAM through the compare lines CD0-CD23. A data word transferred to the CAM by the compare lines CD0-CD23 is compared to the data words previously written into the CAM. If all 24 bits of a stored data word agree with the comparison word, the CAM creates a match signal. The match signal therefore indicates that the comparison word transferred through the lines CD0-CD23 had already been stored in the CAM as a data word before the comparison process. The match signal is stored in one of the read/write memories E0 or E1 belonging to the CAM. The match signal will be stored in the read/write memory E0 if the data word which agrees with the comparison word is located in memory array

REFERENCES:
patent: 5280447 (1994-01-01), Hazen et al.
patent: 5564052 (1996-10-01), Nguyen et al.

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