Content addressable memory device capable of reducing memory...

Details Content addressable memory device capable of reducing memory... Content addressable memory device capable of reducing memory...

2005-01-04

2005-01-04

Phung, Anh (Department: 2824)

Static information storage and retrieval

Associative memories

Ferroelectric cell

C365S200000

Reexamination Certificate

active

06839257

ABSTRACT:
The invention provides a content addressable memory device having the capability of functioning as a content addressable memory device with a reduced memory capacity even when the device includes a large number of failed words in some memory blocks.To achieve the above object, the content addressable memory device according to the present invention includes a memory part including a plurality of memory blocks which can be controlled independently of each other, a failed memory block information memory for, when there is a failed memory block, storing address information associated with the failed memory block and outputting a signal indicating the failed memory block, and an encoder for, in accordance with the signal and an address input from the outside, outputting a memory block selection signal to the respective memory blocks to enable a memory block other than the failed memory block without enabling the failed memory block.

REFERENCES:
patent: 6597595 (2003-07-01), Ichiriu et al.
patent: 6611445 (2003-08-01), Kanazawa et al.
patent: 6714466 (2004-03-01), Park et al.
patent: A-2000-30487 (2000-01-01), None
“A 1-Mb 2-Tr/b Nonvolatile CAM Based on Flash Memory Technologies”, Tohru Miwa, Hachiro Yamada, Yoshinori Hirota, Toshiya Satoh, and Hideki Hara, IEEE Journal of Solid-State Circuits, vol. 31, No. 11, Nov. 1996.

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