Content addressable memory (CAM) devices having NAND-type...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S049130, C365S104000

Reexamination Certificate

active

11553202

ABSTRACT:
Content addressable memory (CAM) devices have CAM cells therein that are electrically coupled to a NAND-type compare circuit. This NAND-type compare circuit is responsive to a first operand (K) containing true and complementary bits of an applied search key and a second operand (D) containing true and complementary bits of a stored search word. The NAND-type compare circuit includes a first string of transistors connected end-to-end in series from a first terminal to a second terminal and a second string of transistors connected end-to-end in series from the first terminal to the second terminal. This first string of transistors has gate terminals responsive to the first operand and the second string of transistors has gate terminals responsive to the second operand.

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Paglamtzis et al., “Content-Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey,” IEEE Journal of Solid-State Circuits, vol. 41, No. 3, Mar. 2008, pp. 712-727.
Choi et al., “A 0.7-fJ/Bit/Search 2.2-ns Search Time Hybrid-Type TCAM Architecture,” IEEE Journal of Solid-State Circuits, vol. 40, No. 1, Jan. 2005, pp. 254-260.
Paglamtzis et al., “A Low-Power Content-Addressable Memory (CAM) Using Pipelined Hierarchical Search Scheme,” IEEE Journal of Solid-State Circuits, vol. 39, No. 9, Sep. 2004, pp. 1512-1519.

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