Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2001-08-14
2002-12-03
Sherry, Michael (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S761010
Reexamination Certificate
active
06489788
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an apparatus for providing electrical signal pathways during test between an electronic device, such as an electronic module or an integrated electrical semiconductor circuit, and an automated test system. The invented assembly more particularly relates to interfacing systems that position an electrical device, the device having electrical contacts arranged within a substantially planar pattern and in a two-dimensional spacing pattern that is common to a plurality of electronic device products.
BACKGROUND OF THE INVENTION
The costs of testing integrated circuit die and packaged electrical devices are significant components of the manufacturing costs of semiconductor devices. The prior art attempts to limit the costs of testing but requires the use of electrical contactors that are overly specific to particular device types. There is therefore a long felt need to provide a test contactor that may be more easily reconfigurable and/or to be useful in testing a wider variety of part numbers than the prior art allows.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide an apparatus, or assembly, useful in testing an electronic device or semiconductor device by an automated test system.
An invented contactor apparatus, or contactor assembly, useful in testing a device under test with an automated test system is provided. The contactor assembly, or assembly, includes a signal distribution board, a pogo body having a plurality of pins, and a device nest. The assembly, or electrical interconnect, provides signal pathways between a set of device electrical contacts of a device under test and the pin electronics of the automated test system.
The device under test, or device, seats within the nest and makes electrical contact with the test system via the pins and the signal distribution board. The device may be a packaged or a partially packaged electronic device, such as a discrete device, a transistor or a plurality of transistors, an electronic memory, a logic device, a linear or analog device, a mixed signal device, a multi-chip module or an integrated semiconductor circuits.
The signal distribution board has a tester side, an upper side and a plurality of signal distribution traces. The traces are composed of an electrically conductive material or composite, such as copper or a copper alloy, or other suitable electrically conductive materials known in the art, in singularly or in combination. Each trace includes a tester side contact, an upper side contact and a signal distribution pathway. Each trace provides an electrical signal pathway from its tester side contact to its upper side contact via its signal distribution pathway. Each trace electrical signal pathway may include one or more passive or active electrical devices and may be bi-directional or unidirectional. The tester side contacts are located along the tester side of the signal distribution board and in a pattern that partially or completely matches a pin electronics pattern of the tester, whereby some or all of the pin electronics contacts of the tester can simultaneously make separate electrical contacts with individual tester side contacts of certain or all of the traces of the signal distribution board. The upper side contacts of the traces are located along the upper side of the signal distribution board and in a two-dimensional grid pattern. The two-dimensional grid pattern may be a partially or totally arranged according to a personality pattern, the personality pattern including a contact pattern or patterns that match a pattern or patterns of device electrical contacts of a variety of electronic device products. The device electrical contact pattern may partially or wholly match a common grid array pattern, where the personality pattern, or grid pattern, comprises the common grid pattern and the personality pattern additionally matches or repeatedly matches the device contact patterns of a plurality of functionally differing or differently shaped packaged or partially packaged devices.
In certain preferred embodiments of the present invention the personality pattern may provide or include a pattern for locating a plurality of electrical contacts in an orthogonal, two-dimensional X axis and Y axis pattern with substantially equivalent X and Y separations of 0.5 millimeter, 0.6 millimeter, 0.8 millimeter, 0.75 millimeter, 1.0 millimeter, 1.2 millimeter, or another suitable device electrical contact arrangement or location pattern known in the art.
In certain still alternate preferred embodiments the personality pattern may alternatively or additionally include a pattern for locating a plurality of device electrical contacts in an orthogonal, two-dimensional X axis and Y axis pattern wherein the separations between certain or all of the electrical device contacts are in a first spacing along the X axis, such as 0.8 millimeter, and a second spacing along the Y axis, such as 1.2 millimeter. The resulting pattern may thereby provide device electrical contacts located in a grid at every or at certain X and Y locations in a 0.8 millimeter X axis by 1.2 millimeter Y axis array, or in another suitable spacing pattern or planar array known in the art.
The pogo body houses a plurality pins, each pin having a board contact, a body and a device contact. The pins are electrical conductive and may comprise suitable electrically conductive materials or composites known in the art, such as gold, nickel, copper or metal alloys, in singularity or in combination.
The pogo body, or vertical signal frame
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, of the preferred embodiment is detachably attached to the signal distribution board by latches, screws, attachments, guide pin and receiver bushing features, ramp and pin mechanisms, or other suitable detachable attachment systems known in the art. The plurality of pins, or plurality of elongate vertical pins, of the preferred embodiment each have a board contact, an elongate body and a device contact. The vertical signal frame
6
maintains the plurality of elongate vertical pins in a substantially perpendicular orientation to the upper side of the signal distribution board. The elongate vertical pins are arranged in a pattern within or by the vertical signal frame
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that matches a device electrical contact pattern of the device under test. The personality pattern of the preferred embodiment repeatedly matches the device electrical contact pattern whereby a plurality of devices having similar or identical device electrical contact patterns may be substantially simultaneously in electrical contact with the automated test system.
The device nest device is a mechanical component that is designed to guide the device under test into an orientation with the pogo body that enables the substantially simultaneous electrical connection of a plurality of electrical contacts of the device under test with the plurality of pins of the pogo body. In the preferred embodiment, the device nest is detachably attached to the vertical signal frame
6
and guides the plurality of electrical contacts of the device under test into electrical contact with the device contacts of the elongate vertical pins. The device nest is designed in accordance with the physical form and dimensions of the device under test and the orientation of the package or partial package of the device under test with the device electrical contact pattern of the device under test. The device nest has a frame with an aperture. The aperture is shaped within the frame to conform to the shape of the package or partial package of the device and to guide the device into electrical contact with the plurality of elongate vertical pins. The aperture is further shaped to stabilize the device within the device nest while the automated tester tests the device.
In the preferred embodiment the device under test may be a ball grid array device that has a device electrical contact pattern arranged in a substantially two-dimensional planar pattern, where individual contacts are located at regular X axis and Y axis
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