Contact type prober automatic alignment

Details Contact type prober automatic alignment Contact type prober automatic alignment

1999-07-30

2001-11-13

Karlsen, Ernest (Department: 2858)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S765010

Reexamination Certificate

active

06316953

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to probe cards for an automatic wafer probing system, and more specifically to the alignment of a membrane prober for a wafer probing system.
BACKGROUND OF THE INVENTION
Wafer probing test has been an important step for ensuring that the semiconductor devices manufactured on a wafer are not defective before they are packaged. A conventional automatic wafer probing system (AWPS) as shown in
FIG. 1
consists of a platen
1
, a forcer
2
on which a wafer chuck
3
is mounted, a ring carrier
4
on which a microscope
5
is mounted, a CCD camera
6
for pattern recognition, a wafer Z-profile sensing assembly
7
, and a material handling assembly, which is not shown in the figure, for loading and unloading a wafer for testing. In general, an X-Y coordinate system is assumed on the platen
1
and the forcer
2
can do positional translation on it, either in X, Y, or simultaneously X and Y directions. The wafer chuck
3
can move in Z (height) direction as well as perform a &thgr; rotation. In addition to holding a probe card in place, the ring carrier
4
has a few precision alignment posts for level-adjusting the probe card by the operator during an initial setup time. Because the AWPS has an automatic alignment module working associated with the CCD camera for doing pattern recognition, the coordinate of the wafer under test can easily be figured out.
FIG. 2
shows a conventional Epoxy needle probe card that is usually used to test one single die during each test. Since the needle type test pins are long, they induce parasitic induction and capacitance effects. Therefore, impedance match becomes difficult to accomplish and causes the degradation of the test speed. In addition, the X-Y shift at the contact test point as well as the difficulty in meeting the area-array pins are some drawbacks of such a probe card. Although needle type probe cards have been built for testing multiple dies, these cards having a large number of pins are expensive to build, maintain and repair. Besides, it is very time consuming to repair damages of such cards and the repairing can only be done by a skilled operator.
As integrated circuits become faster and more complex, the number of input/output (I/O) pads increases drastically. In order to accommodate the increasing number of I/O pads, the size and spacing of pads must decrease. I/O pads in an area-array format have been proposed for integrated circuits having large number of inputs and outputs. For circuit chips designed to be used in multi-chip modules (MCM), the area-array format becomes more common and may replace the traditional periphery format. The probing test of such chips using conventional needle probe cards, however, is very difficult because of the area-array format and the reduction in pad size and spacing.
The traditional approach of using a conventional probe card to interface a chip introduces parasitic capacitance and inductance that make it impossible to test the chip at full speed. Therefore, chips that are functional but do not meet speed requirements are usually packaged and then scraped later. This has become a severe problem as the operational speed of circuit devices continues to increase. Scraping and reworking finished systems that do not meet speed requirements greatly increases manufacturing cost. Therefore, it has become essential to test circuit devices such as MCMs at full speed. Furthermore, the output drivers of an advanced circuit device are designed with a smaller size in anticipation of reduced parasitic effects between chips. Hence, they are less effective in driving the conventional probe card and the tester. An accurate sort of good chips at the wafer level can save significant packaging costs. In order to provide a better screening process at the wafer level, it is necessary to use probe cards that have higher resolutions and allow testing at higher speeds. The probe cards also have to place less loading to the output drivers of the device under test.
An electronic membrane prober is a membrane style probe card fabricated from a silicon wafer with typical integrated circuit and micro-machining technologies. The membrane prober (MP) is capable of providing a very large number of probe tips in any format, including area-array prober pad format, and is designed to satisfy the requirements of high speed and high resolution wafer-level testing. The membrane is a thin, free-handling and low stress layer of silicon, silicon dioxide, silicon carbide, silicon nitride or polyimide.
FIG. 3
shows a conceptual design of the membrane prober. The probe lines are aluminum and the probe tips are tungsten. The probe card is fabricated with conventional integrated circuit processing techniques that are well established. In addition, more functionality can be added to the prober because active test circuitry can also be placed on the membrane prober.
The membrane film of a membrane prober provides the mechanical support for the probe lines and tips as well as the alignment of the probe card to the wafer under test if the membrane film is transparent. Although there are many advantages over a conventional epoxy needle probe card, it is necessary that the membrane prober has the transparency characteristic on its membrane film. When the density of the test tips and the area of the membrane become higher and larger, the transparency requirement will be difficult to meet. It may be possible to design a sophisticated optical system between the membrane prober and the wafer under test so that they can be aligned. However, the cost and maintenance are expensive. In addition, the space constraint on a wafer probing test system may make the manipulation of such a complex optical alignment system unappreciative.
SUMMARY OF THE INVENTION
The present invention has been made to overcome the above mentioned drawbacks of a membrane prober. The primary object of this invention is to provide almost automatic alignment methods for a wafer probing test system. Another object of this invention is to provide alignment patterns that can be used in the alignment methods of this invention. It is also an object of this invention to provide measurement circuits for acquiring data in the alignment methods.
According to the present invention, alignment patterns are designed and manufactured on both a membrane prober and the wafer under test. The alignment pattern on the membrane prober comprises a plurality of test tips forming a virtual circle and another test tip at the center of the virtual circle. A solid metal pad is formed on the wafer under test as the alignment pattern. Two necessary conditions are first met in the pre-alignment process for setting up the prober onto a ring carrier to position it properly for the alignment method. By making the prober contact the wafer, conduction paths are formed by the alignment patterns. A measurement circuit is then used to acquire a first set of data for providing information on the relative position of the membrane prober to the wafer.
A second set of data are required for providing further information for aligning the membrane to the wafer. Two approaches are presented in the invention for acquiring the data. The second set of data can be obtained by moving the membrane prober with an offset distance and acquiring the data from the conduction paths formed while the prober and the wafer have a second contact. The can also be obtained by having two pair of alignment patterns. Based on the two sets of data, this invention presents alignment algorithms for determining the translation offset as well as the rotation angle between the membrane prober and the wafer under test.
Both first and second sets of data are acquired by a circuit that measures the conduction paths formed by the test tips of the membrane prober and the wafer. How the test tips located on the virtual circle can form conduction paths with respect to the test tip at the center through the solid metal pad depends on the relative position of the prober to the wafer. The information about the

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