Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2001-12-20
2003-12-02
Nguyen, Ha Tran (Department: 2812)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C438S649000, C438S660000, C438S683000, C438S630000, C257S757000, C257S762000
Reexamination Certificate
active
06657301
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a contact structure, a method of manufacturing such a contact structure, a semiconductor device, and a method of manufacturing such a semiconductor device. More specifically, the present invention relates to a contact structure that can inhibit the elevation the resistance of the contact even at the time of performing heat-treatment, a method of manufacturing such a contact structure, a semiconductor device, and a method of manufacturing such a semiconductor device, a semiconductor device that utilizes such a contact structure, and a method of manufacturing such a contact structure.
2. Background Art
The present invention relates to a contact structure typically used for the connection between the diffused layer in the Si substrate of a semiconductor device and metal wirings formed on the upper surface of the insulating layer on the Si substrate; and a method of manufacturing such a contact structure. The present invention will be described below referring to such a case as an example.
FIGS. 5 and 6
are schematic sectional views for illustrating a conventional contact structure.
A method of forming such a contact structure will be described below referring to FIG.
5
.
First, an insulating layer
4
is formed on the surface of a Si substrate
2
, for example, by a CVD method. The insulating layer
4
is subjected to exposure to the light, etching, on the like to form a connection hole
6
. As
FIG. 5A
shows, the connection hole
6
passes through the insulating layer
4
, and the Si substrate
2
is exposed on the bottom
6
A of the connection hole
6
.
Next, on the inner wall of the connection hole
6
, a TiN/Ti film
14
is formed by a sputtering technique as a barrier layer for preventing diffusion and reaction between the conductive member and the Si substrate
2
.
If the Si substrate
2
is maintained at a high temperature during the formation of the TiN/Ti film
14
, Ti in the TiN/Ti film
14
reacts with Si in the Si substrate
2
at the bottom
6
A of the connection hole
6
, where the Ti film laminated earlier contacts the Si substrate
2
, to form a silicide as
FIG. 5B
shows. Even if the Si substrate
2
is not maintained at a high temperature, if the Si substrate
2
is subjected to a heat treatment at a high temperature in a subsequent process, Ti in the TiN/Ti film
14
reacts with Si in the Si substrate
2
to form a silicide. Thus, a TiSi
2
film or a TiSi film
32
is formed on the bottom
6
A of the connection hole
6
.
Next, as
FIG. 5C
shows, the connection hole
6
filled with W, a conductive member
16
, by a CVD method or the like. In other words, W is deposited on the entire surface of the TiN/Ti film
14
until the connection hole
6
is filled.
As described above, a contact structure as
FIG. 5C
shows is formed.
If the TiSi
2
or TiSi film
32
formed on the bottom of the connection hole
6
is subjected to a heat treatment at 700° C. or higher during the formation of the TiN/Ti film
14
, aggregation occurs, whereby the contact resistance at the TiSi
2
or TiSi film
32
elevates. Furthermore, if the aggregation of TiSi
2
or TiSi proceeds, voids are formed in this area, and the breakdown of electrical connection may be considered.
In order to solve such problems, as
FIG. 6
shows, a method of forming a CoSi
2
film, which has the heat resistance higher than the heat resistance of a TiSi
2
film, is formed on the bottom of the connection hole
6
, may be used instead of the TiSi
2
or TiSi film
32
.
In this method, first as
FIG. 6A
shows, a Co film
34
is formed on the upper surface
4
A of the insulating film
4
, the bottom
6
A of the connection hole
6
, and the side
6
B of the connection hole
6
by sputtering or the like, prior to the formation of the barrier layer
14
.
Next, as
FIG. 6B
shows, heat treatment is performed to allow the Co film
34
to react with the Si substrate, to form a CoSi film
36
A on the bottom
6
A of the connection hole
6
. Then, as
FIG. 6C
shows, the Co film
34
that has not reacted with the Si substrate is removed, leaving the CoSi film
36
A on the bottom
6
A of the connection hole
6
. Thereafter, the heat treatment is performed again to allow the CoSi film
36
A with Si to form a CoSi
2
film
36
.
Next, as
FIG. 6D
shows, a TiN/Ti film
14
is formed as a barrier layer. Furthermore, a conductive member
16
is deposited on the surface of the TiN/Ti film
14
, and fills the connection hole
6
. Thus, a contact structure as shown in
FIG. 6E
is formed.
However, even if such a CoSi
2
film
36
is used, CoSi
2
aggregates at a heat-treatment temperature above 750° C. As a result, the contact resistance of the CoSi
2
film
36
elevates, or voids are formed, and electrical connection may be broken.
REFERENCES:
patent: 4910578 (1990-03-01), Okamoto
patent: 4926237 (1990-05-01), Sun et al.
patent: 6124639 (2000-09-01), Domenicucci et al.
patent: 6288430 (2001-09-01), Oda
patent: 6391767 (2002-05-01), Huster et al.
patent: 8-31768 (1996-02-01), None
patent: 10-55982 (1998-02-01), None
patent: 2000-223568 (2000-08-01), None
Kanda Yasuhiro
Maekawa Kazuyoshi
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
Nguyen Ha Tran
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