Contact plug processing and a contact plug

Details Contact plug processing and a contact plug Contact plug processing and a contact plug

2006-10-17

2006-10-17

Tran, Minhloan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

C257S770000

Reexamination Certificate

active

07122903

ABSTRACT:
A semiconductor device has anisotropically formed via holes through a PMD layer. The anisotropic geometry of the via holes results in the diameter of a via hole over a gate structure being equal to the diameter of a via hole not over the gate structure. The via holes are formed by depositing a silicon layer and an antireflective layer over the PMD layer. The silicon layer and the antireflective layer are etched to have holes with a regular taper. The holes through the PMD are anisotropically etched so as to have straight walls.

REFERENCES:
patent: 5712194 (1998-01-01), Kanazawa
patent: 6791187 (2004-09-01), Ema et al.

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