Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1998-10-20
2001-10-09
Karlsen, Ernest (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S765010, C714S733000
Reexamination Certificate
active
06300785
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to devices for testing semiconductor wafers during manufacturing and, more specifically, to testing devices which do not contact the device under test (DUT).
2. Description of the Related Art
During the manufacturing of semiconductor devices and wafers, unwanted defects occasionally occur. In order to reduce such defects and increase production yield it is desirable to test the item being manufactured at various points during the manufacturing process.
Conventional systems remove the item being manufactured from the production line at different fabrication steps and test the item for defects. Depending on the development needs, a semiconductor wafers could be pulled at the post-silicide polysilicon stage, during the local interconnect stage or at several of the metalization stages, such as post metal-1 anneal, post via-1 planarization, or post metal-2 etch, for testing.
Conventional testing systems come in physical contact with the item being manufactured. Specifically, most conventional systems connect test pins to contacts on the wafer being manufactured to determine whether the electrical connections formed on the wafer are operating properly.
Some conventional devices measure the electromagnetic near field distribution adjacent to the device under test. Such systems require a physical connection to supply power to the device under test.
By making physical contact with the item being manufactured, the conventional systems introduce foreign materials in the production line, which increases the chance of defects being produced in subsequent processing steps and, therefore, reduces overall yield for the manufacturing process.
SUMMARY OF THE INVENTION
It is, therefore, an object of the present invention to provide a structure and method to determine important device parameters and in-line yield parameters (such as device channel length and metal defects), without physically probing the wafers. The invention includes a light powered generator, a radio frequency generator, a radio frequency receiver, a charge transfer circuit and a light source to power the device under test (DUT).
More specifically, the inventive device has circuits formed thereon, and comprises a circuit including a frequency generator for generating a detectable radio frequency energy when powered, and a power generator, coupled to the frequency generator, for generating power when exposed to light.
The radio frequency energy comprises detectable characteristics correlating to a level of processing quality of the device. The frequency generator comprises a ring oscillator. The power generator comprises a plurality of diodes. The plurality of diodes are each formed in a separate well and coupled in series for generating voltage when exposed to light. The power generator includes an antenna. The antenna comprises signal wiring connected to the power generator.
The invention also includes a current amplifying device connected to the power generator. The current amplifying device comprises a capacitor connected to the power generator and is charged by the power generator, a transistor for controlling the capacitor, and a second series of diodes for activating the transistor when exposed to light.
The power generator comprises a power generating circuit comprising a substrate, a plurality of diodes each formed in a separate well in the substrate and coupled in series for generating voltage when exposed to light and an opaque layer overlapping at least a border formed by the well and the substrate for preventing activating a parasitic diode when exposed to the light.
The invention also includes a system for testing semiconductor chips comprising a circuit including a frequency generator for generating a detectable radio frequency energy when powered, a power generator, coupled to the frequency generator, for generating power when exposed to light, an optical device for generating the light, a receiver for detecting the radio frequency energy, and an analyzer connected to the receiver for analyzing the radio frequency energy.
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Cook Donald J.
Nowak Edward J.
Tong Minh H.
International Business Machines - Corporation
Karlsen Ernest
McGinn & Gibb PLLC
Shkurko, Esq. Eugene I.
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