Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2001-04-20
2002-11-12
Sherry, Michael (Department: 2829)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S128000, C438S129000
Reexamination Certificate
active
06479319
ABSTRACT:
FIELD
This invention relates to the field of integrated circuits. More particularly this invention relates to the field of integrated circuit packaging designs for increasing the number of electrical connections to an integrated circuit without increasing the surface area of the integrated circuit used for the electrical connections, or decreasing the surface area of the integrated circuit used for the electrical connections without decreasing the number of electrical connections.
BACKGROUND
As the number of component circuits within an integrated circuit increases, there tends to be a commensurate pressure to increase the number of electrical connections to the integrated circuit. However, increasing the number of electrical connections is often accompanied by an increase in the surface area of the integrated circuit that is used to make the electrical connections. As there is also a continual incentive to reduce the overall size of the integrated circuit, increasing the number of electrical connections to an integrated circuit is a design goal that is often at odds against reducing the size of the integrated circuit.
What is needed therefore, is an electrical connection system for an integrated circuit that increases the number of electrical connections within a given amount of surface area of the integrated circuit, or conversely, which allows the size of the integrated circuit to be reduced without reducing the number of electrical connections to the integrated circuit.
SUMMARY
The above and other needs are provided by a substrate for electrically connecting to an integrated circuit, where the integrated circuit has differential pairs of signals that are associated with differential pairs of integrated circuit contacts on the integrated circuit. The substrate has a first substrate layer and at least one underlying substrate layer.
Differential pairs of substrate contacts are disposed on the first substrate layer in alignment with the differential pairs of integrated circuit contacts. The differential pairs of substrate contacts make electrical connections with the differential pairs of integrated circuit contacts. The differential pairs of substrate contacts receive the differential pairs of signals from the integrated circuit through the differential pairs of integrated circuit contacts. The differential pairs of substrate contacts also send the differential pairs of signals to the integrated circuit through the differential pairs of integrated circuit contacts.
Differential pairs of vias are also disposed on the first substrate layer, and extend to the at least one underlying substrate layer. The differential pairs of vias make electrical connections with the differential pairs of substrate contacts. The differential pairs of vias also receive the differential pairs of signals from the integrated circuit through the differential pairs of substrate contacts. Further, the differential pairs of vias send the differential pairs of signals to the integrated circuit through the differential pairs of substrate contacts. Each via within a given one of the differential pairs of vias is disposed within a column with each other on the first substrate layer. The columns for each of the differential pairs of vias are in a substantially parallel arrangement one with another.
Differential pairs of traces are disposed on the at least one underlying substrate layer. The differential pairs of traces make electrical connection with the differential pairs of vias. The differential pairs of traces also receive the differential pairs of signals from the integrated circuit through the differential pairs of vias. Further, the differential pairs of traces send the differential pairs of signals to the integrated circuit through the differential pairs of vias. Each trace within a given one of the differential pairs of traces is disposed adjacent each other, and routed to a peripheral portion of the at least one underlying substrate layer in a substantially side by side arrangement.
Thus, by disposing the differential contacts in a manner that the differential vias are in a substantially parallel and columnar format, the differential traces may be then placed in positions that are substantially adjacent one to another, and may be routed closer together. Thus, a greater number of traces can be disposed within a given amount of surface area of the substrate.
In other aspects of the invention, a packaged integrated circuit is provided, and a method for electrically connecting an integrated circuit to a substrate is described.
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Ghahghahi Farshad
Mora Leonard L.
Geyer Scott B.
Luedeka Neely & Graham PC
Sherry Michael
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