Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal
Reexamination Certificate
2001-10-23
2002-07-23
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
C257S745000
Reexamination Certificate
active
06423562
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a contact electrode for a gallium nitride-based compound semiconductor device and a method for forming the same, and more specifically to an n-type contact electrode having a low specific contact resistance, for a gallium nitride-based compound semiconductor device and a method for forming the same.
2. Description of Related Art
An n-type contact electrode for a gallium nitride-based compound semiconductor device has realized a relatively low specific contact resistance by using a multi-layer or alloy electrode and an n-type GaN contact layer. For example, Japanese Patent Application Pre-examination Publication No. JP-A-07-045867, the content of which is incorporated by reference in its entirety into this application, and U.S. Pat. No. 5,563,422 claiming Convention Priorities based on eight Japanese patent applications including said Japanese patent application, the content of which is incorporated by reference in its entirety into this application, disclose that an alloy of Ti (titanium) and Al (aluminum) and a multi-layer film of Ti and Al are preferred as the n-type contact electrode. This will be called a “first prior art example” hereinafter.
Referring to
FIG. 1
, there is shown a diagrammatic sectional view of the n-type contact electrode of the first prior art example. As shown in
FIG. 1
, the n-type contact electrode of the first prior art example. As shown in
FIG. 1
, the n-type contact electrode has a construction in which a Ti layer
102
and an Al layer
103
are deposited on an n-type GaN contact layer
101
in the named order. In this construction, an ohmic characteristic is obtained by annealing at a temperature of not less that 400° C.
Referring to
FIGS. 2A
to
2
D, there are shown diagrammatic sectional views for illustrating one method for forming the electrode structure of the first prior art example. This method is disclosed by A. T. Ping et al, “Ohmic Contacts to n-type GaN Using Pd/Al Metallization”, Journal of Electronic Materials, Vol. 25, No. 5, 1996, pp.819-824, the content of which is incorporated by reference in its entirety into this application. This method will be called a “second prior art example” hereinafter.
In the method of the second prior art example, first, an n-type GaN contact layer
101
is etched by a dry-etching as shown in
FIG. 2A
, and an ashing processing is conducted by using an oxygen plasma as shown in
FIG. 2B
, and thereafter, as a pre-processing, an etching is conducted by using a hydrochloric acid aqueous solution as shown in
FIG. 2C
, and then, the Ti layer
102
and the Al layer
103
are deposited on the n-type GaN contact layer
101
in the named order as shown in FIG.
2
D. Finally, a rapid thermal annealing (abbreviated to “RTA”) is conducted at a temperature of 650° C. for 30 seconds.
In this case, a specific contact resistance of 6×10
−6
&OHgr;cm
2
is obtained. This specific contact resistance does not greatly change even if the RTA temperature changes in the range of 550° C. to 750° C. However, if the RTA temperature is less than 550° C. or if no annealing is conducted, the ohmic characteristics cannot be obtained.
Furthermore, Japanese Patent Application Pre-examination Publication No. JP-A-07-221103, the content of which is incorporated by reference in its entirety into this application (an English abstract of JP-A-07-221103 is available from the Japanese Patent Office and the content of the English abstract of JP-A-07-221103 is also incorporated by reference in its entirety into this application), discloses an electrode structure which has improved the electrode structure of the first prior art example. This will be called a “third prior art example” hereinafter.
In the electrode structure of this third prior art example, after a double layer metal film of Ti and Al is formed on an n-type semiconductor layer with Ti being in contact with the n-type semiconductor layer, or after an alloy film of Ti and Al is formed on the n-type semiconductor layer, a metal having a melting point higher than that of Al is deposited. The third prior art exemplifies Au, Ti, Ni, Pt, W, Mo, Cr and Cu as metal having a melting point higher than that of Al, and mentions that Au, Ti and Ni are particularly preferable.
Referring to
FIG. 3
, there is shown a diagrammatic sectional view of the n-type contact electrode of the third prior art example. As shown in
FIG. 3
, the n-type contact electrode has a construction having a Ti layer
102
, an Al layer
103
, an Ni layer
104
and an Au layer
105
, which are deposited on an n-type GaN contact layer
101
in the named order. In this example, an ohmic characteristics is obtained by annealing at a temperature of not less than 400° C., similarly to the first prior art example.
In the contact electrode structure of the third prior art example, the Ni layer
104
prevents aluminum from separating out to a surface and also suppresses oxidation of aluminum. Therefore, it is advantageous in that a bonding wiring formed onto the Au layer
105
becomes difficult to be peel off.
Referring to
FIGS. 4A and 4B
, there are shown diagrammatic sectional views for illustrating one method for forming the electrode structure of the third prior art example. This method is disclosed by Z. Fan et al, “Very low resistance multilayer ohmic contact to n-GaN”, Applied Physics Letters, Vol. 68, No. 12, Mar. 18, 1996, pp.1672-1674, the content of which is incorporated by reference in its entirety into this application. This method will be called a “fourth prior art example” hereinafter.
In the method of the fourth prior art example, first, an n-type GaN contact layer
101
is etched by a dry-etching as shown in
FIG. 4A
, and then, a Ti layer
102
, an Al layer
103
, an Ni layer
104
and an Au layer
105
are deposited on the n-type GaN contact layer
101
in the named order as shown in FIG.
4
B. Finally, the RTA processing is conducted at a temperature of 900° C. for 30 seconds.
In this electrode structure, a specific contact resistance of 8.9×10
−8
&OHgr;cm
2
is obtained, which is remarkably lower than the value obtained in the second prior art example. In this case, it is important that the Ni layer
104
and the Al layer
103
are thick. In addition, it is an indispensable condition for obtaining a low specific contact resistance that Ni and Au never diffuse into the n-type GaN contact layer
101
. On the other hand, it was reported that when no annealing is conducted, the specific contact resistance is 3.3×10
−6
&OHgr;cm
2
.
In the above mentioned prior art examples, a minimum specific contact resistance of 8.9×10
−8
&OHgr;cm
2
is obtained in the fourth prior art example. However, the annealing at as a high temperature as 900° C. deteriorates other electrodes, semiconductor films and insulator films in the case that a semiconductor device is manufactured, and therefore, resultantly remarkably restricts a device manufacturing process. Accordingly, it is necessary to lower a necessary annealing temperature.
In addition, the fourth prior art reported that when no annealing is conducted, the specific contact resistance of 3.3×10
−6
&OHgr;cm
2
is obtained. The inventors actually manufactured the n-type contact electrodes in the same process as the fourth prior art example, and measured a contact characteristics of the n-type contact electrodes manufactured, However, no ohmic characteristics could be obtained when the annealing was conducted at a temperature of not greater than 400° C. or when no annealing was conducted. This is because of damage on the surface of the n-type GaN contact layer
101
by the dry etching in the step shown in
FIG. 4A
, with the result that it is difficult to obtain the ohmic characteristics with good reproducibility, when the annealing is conducted at a temperature of not greater than 400° C. or when no annealing is conducted. Furthermore, it is not preferred that damage remains on the contact layer when the annealing is
Hisanaga Yukihiro
Nido Masaaki
NEC Corporation
Nelms David
Sughrue & Mion, PLLC
Vu David
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