Contact array for semiconductor package

Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...

Reexamination Certificate

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Details

C439S091000

Reexamination Certificate

active

06752634

ABSTRACT:

FIELD
This invention relates to a contact array for connecting a semiconductor package to a circuit board. More particularly, this invention relates to a low-profile array of contacts carried by a tape for connecting a semiconductor package to a circuit board.
BACKGROUND
Since semiconductor chips are very small, it is preferable to first mount the chip in a package using a ball grid array or similar arrangement and then to mount the package on the circuit board. Electrical connections must be made between the chip and the substrate in the package and also between the substrate and the circuit board. A popular method of making the connection between the substrate and board is the use of pin connectors.
While these pin connectors generally have been reliable, there are certain problems which have not yet been overcome. The first problem is the cost to manufacture the pins and the sockets into which they fit. Presently, the bodies used to hold the contacts are molded out of liquid crystal polymer material. This requires specialized skills and equipment to design and mold the parts. Controlling the tolerances on liquid crystal polymer molding is a major limit for scaling these connectors to smaller pitches and lower profiles.
The ability to have lower profiles is especially important in this environment. When the substrate and the circuit board are close together, the connectors between the two are short. This leads to not only a lower resistivity, but also a lower inductance. It also leads to a smaller size for the circuit board, which is always important in integrated circuitry. Prior art low-profile contacts have been on the order of 3 ½ mm. A reduction in this size, along with a lower resistivity, lower inductance and the resultant improvement in signal clarity and speed would be a desirable feature.


REFERENCES:
patent: 4402562 (1983-09-01), Sado
patent: 5046953 (1991-09-01), Shreeve et al.
patent: 5801441 (1998-09-01), DiStefano et al.
patent: 6052286 (2000-04-01), Worthen et al.
patent: 6176708 (2001-01-01), Michiya
patent: 6193523 (2001-02-01), Harper, Jr.
patent: 6220869 (2001-04-01), Grant et al.
patent: 6224396 (2001-05-01), Chan et al.
patent: 6435883 (2002-08-01), Warren

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