Constant voltage power supply with normal and standby modes

Details Constant voltage power supply with normal and standby modes Constant voltage power supply with normal and standby modes

2000-08-04

2001-05-22

Sterrett, Jeffrey (Department: 2838)

Electricity: power supply or regulation systems

Output level responsive

Using a three or more terminal semiconductive device as the...

C323S284000

Reexamination Certificate

active

06236194

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a constant voltage power supply, and, in particular, to a constant voltage power supply supplying power to a load having an operation condition and a standby condition switched to one another.
2. Description of the Related Art
A constant voltage power supply having a constant voltage circuit (Voltage Regulator, referred to as a VR, hereinafter) and supplying power in a stable voltage is used in a cellular phone or the like. Such a constant voltage power supply has a constant voltage circuit (high-speed VR) having a large power (current) consumption in order to improve a PSRR (ripple removal rate) and a load transient responsivity. Therefore, when such a constant voltage power supply is applied to a device such as a cellular phone which has an active mode (operation condition) and a sleep mode (standby condition), useless power (current) consumption is large in the sleep mode in which high PSRR and load transient responsitivy are not needed.
In order to solve such a problem, a constant voltage power supply is considered which has the high-speed VR and also another VR (low-speed VR) having lower PSRR and load transient responsivity but having a smaller power (current) consumption and has a function of switching VRs in accordance with the condition of a load. Although the low-speed VR has the PSRR and load transient responsivity lowered as a result of having the smaller power (current) consumption, there is no problem when the load is in the sleep mode.
A configuration shown in
FIG. 1
is considered for configuring a constant voltage power supply having the high-speed VR and low-speed VR.
In order to supply power to a load
3
from a power-source voltage applying terminal
1
stably, a high-speed VR
5
a
and a low-speed VR
5
b
are provided. For example, the high-speed VR
5
a
and low-speed VR
5
b
have transistors having different sizes but having the same configuration. Specifically, the size of the transistor of the high-speed is such as to have a large current supply capability. The high-speed VR
5
a
and low-speed VR
5
b
have input terminals (Vbat)
7
a
and
7
b
to which the power-source voltage applying terminal
1
is connected, reference voltage parts (Vref)
9
a
and
9
b
, operational amplifiers (OPAMP)
11
a
and
11
b
, output transistors (P-channel MOS transistors: DRV)
13
a
and
13
b
, voltage-dividing resistors R
1
, R
2
and R
3
, R
4
, and output terminals
15
a
and
15
b
, respectively.
In the high-speed VR
5
a
, the output terminal of the operational amplifier
11
a
is connected to the gate electrode of the output transistor
13
a
, the reference voltage Vref is applied to the inverted input terminal of the operational amplifier
11
a
by the reference voltage part
9
a
, the voltage obtained as a result of the output voltage Vout being divided by the resistors R
1
and R
2
is applied to the non-inverted input terminal of the operational amplifier
11
a
, and control is performed such that the voltage obtained as a result of the output voltage Vout being divided by the resistors R
1
and R
2
is equal to the reference voltage.
The high-speed VR
5
a
and low-speed VR
5
b
enclosed by broken lines, respectively, are formed on separate chips, respectively.
The output terminals
15
a
and
15
b
of the high-speed VR
5
a
and low-speed VR
5
b
are connected to the load
3
through a switching unit
17
. The load
3
has an active mode in which the power consumption is tens of mA and a sleep mode in which the power consumption is tens of &mgr;A switched to one another. A switching logic circuit (switching LOGIC)
19
which outputs switching signals to the switching unit
17
is connected to the load
3
. The switching logic circuit
19
outputs to the switching unit
17
a switching signal “H” when the load
3
is in the active mode but a switching signal “L” when the load
3
is in the sleep mode. The switching unit
17
connects the output terminal
15
a
of the high-speed VR
5
a
to the load
3
when having the switching signal “H” input thereto, but connects the output terminal
15
b
of the low-speed VR
5
b
to the load
3
when having the switching signal “L” input thereto. Thus, the high-speed VR
5
a
or low-speed VR
5
b
is selected in accordance with the condition of the load
3
.
Each of the high-speed VR
5
a
and low-speed VR
5
b
enters a standby condition when not being selected, and have the power (current) consumption equal to or smaller than 1 &mgr;A.
Thus, the high-speed VR
5
a
is selected when the load
3
is in the active mode, but the low-speed VR
5
b
is selected when the load
3
is in the sleep mode. Thereby, the power (current) consumption is appropriately controlled.
However, in the configuration shown in
FIG. 1
, when the high-speed VR
5
a
, low-speed VR
5
b
and switching unit
17
are mounted on one chip (semiconductor chip), the two output transistors
13
a
and
13
b
need large areas thereon. Further, because the switching unit
17
needs to have a capability of having a current flowing therethrough equivalent to the output transistors
13
a
and
13
b
, and thus to have a low resistance, it also needs a large area. Thus, when this configuration is achieved on one chip including the switching unit
17
, the chip area is considerably large.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a constant voltage power supply which can appropriately control a current flowing through VR in accordance with the condition of a load without having the above-described problem.
A constant voltage power supply, according to a first aspect of the present invention, supplying power to a load having an operation condition and a standby condition switched to one another, comprises:
a first constant voltage circuit comprising a first operational amplifier having a reference voltage applied to a first input terminal thereof and a voltage obtained as a result of an output voltage being divided applied to a second input terminal thereof, and controlling an output transistor with an output of the first operatioanal amplifier;
a second constant voltage circuit comprising a second operational amplifier having a reference voltage applied to a first input terminal thereof and a voltage obtained as a result of the output voltage being divided applied to a second input terminal thereof, and controlling the output transistor with an output of the second operatioanal amplifier, a current consumption of the second constant voltage circuit being smaller than a current consumption of the first constant voltage circuit;
a switching part provided for each of the first and second operational amplifiers and making connection and disconnection between an output terminal of the operational amplifier and the output transistor; and
a switching logic circuit controlling the switching units so that the first operational amplifier is connected to the output transistor when the load is in the operation condition but the second operational amplifier is connected to the output transistor when the load is in the standby condition.
When the load is in the operation (working) condition, the output transistor is controlled by the output of the first operational amplifier, but the output transistor is controlled by the output of the second operational amplifier having the smaller current consumption (power consumption) when the load is in the standby condition. Thereby, it is possible to reduce the current consumption.
Further, the output transistor is common to the first and second constant voltage circuits. Accordingly, it is possible to reduce an area of a chip when the constant voltage power supply is achieved on the one chip.
Further, the switching units are used to control supply of merely a control signal controlling the output transistor. Accordingly, the switching units need a small area on the chip. Accordingly, it is possible to prevent the necessary area on the chip from increasing even when the two switching units are provid

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