Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1985-02-14
1986-11-18
Heyman, John S.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307265, H03K 301
Patent
active
046238468
ABSTRACT:
A digital clock generator circuit which accepts a rate signal and a master clock signal and generates an output clock signal exhibiting a frequency which is programmed by the rate signal is disclosed. A constant duty cycle characteristic of the output clock signal is obtained regardless of the output clock signal's frequency. A memory element which generates the output signal is placed in one logical state when a counter portion of the present invention reaches a terminal count. The memory element is placed in an opposing logical state whenever the counter achieves 1/2 of its programmed value. A duty cycle compensator makes small timing adjustments to compensate for any truncation error which occurs in dividing the rate signal by two.
REFERENCES:
patent: 3683159 (1972-08-01), Welch et al.
patent: 3805167 (1974-04-01), Nash et al.
patent: 4019029 (1977-04-01), Pozzetti
patent: 4352995 (1982-10-01), Yoshida et al.
patent: 4355283 (1982-10-01), Ott
Gresham Lowell W.
Heyman John S.
Motorola Inc.
Ohralik Karl
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