Constant current driver circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

Reexamination Certificate

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Reexamination Certificate

active

06466080

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a constant-current driver circuit, and, more specifically, relates to a constant-current driver circuit that drives a load element, such as an LED, by on-off controlling an output current in response to an input signal.
In a semiconductor integrated circuit device, a constant-current driver circuit or a basic operation circuit is widely used. For example, the constant-current driver circuit is mounted on an infrared-ray data communication apparatus or various portable OA devices to drive a light-emitting diode (LED) used for infrared-ray data communication. The constant-current driver circuit performs on-off control of the output current in response to a pulse transmission signal to operate the LED for emitting light or stop the emission repeatedly. Recently, with the diversification of data and the increase in the amount of communication data, a communication speedup of the constant-current driver circuit for infrared-ray data communication is required.
FIG. 1
is a schematic circuit diagram of a first constant-current driver circuit
10
of the prior art.
The constant-current driver circuit
10
includes a differential pair
11
and a constant-current source
12
. The differential pair
11
includes first and second N channel MOS (NMOS) transistors Q
1
, Q
2
. The sources of the first and second transistors Q
1
, Q
2
are connected to each other and to a low potential power supply VSS via a constant-current source
12
. The drain of the first transistor Q
1
is connected to a high potential power supply VDD, and the drain of the second transistor Q
2
is connected to an output terminal of the constant-current driver circuit
10
. A cathode of the light-emitting diode (LED) D
1
is connected to the output terminal, and an anode of the light-emitting diode D
1
is connected to the high potential power supply VDD.
A reference voltage Vref is provided to the gate of the first transistor Q
1
(or the second transistor Q
2
), and a pulse input signal Sin is provided to the gate of the second transistor Q
2
(or the first transistor Q
1
). The first and second transistors Q
1
, Q
2
are complementarily turned on or off based on the levels of the reference voltage Vref and the input signal Sin so that an output current Iout intermittently flows into the light-emitting diode D
1
. As a result, the constant-current driver circuit
10
operates the light-emitting diode D
1
to emit light or stop the emission in response to the input signals Sin.
The differential pair
11
of the constant-current driver circuit
10
is suitable for the high speed operation. However, a current always flows into the constant-current source
12
. Thus, the current consumption of the constant-current driver circuit
10
is increased.
FIG. 2
is a schematic circuit diagram of a second constant-current driver circuit
20
of the prior art.
The constant-current driver circuit
20
includes a constant-current source
21
, an analog switch
22
, and a current mirror circuit
23
. The current mirror circuit
23
includes input and output NMOS transistors Q
3
, Q
4
. The source of the input transistor Q
3
is connected to a low potential power supply VSS, and the drain thereof is connected to a high potential power supply VDD via the analog switch
22
and the constant-current source
21
. The gate of the input transistor Q
3
is connected to its drain and to the gate of the output transistor Q
4
. The source of the output transistor Q
4
is connected to a low potential power supply VSS, and the drain thereof is connected to the output terminal of the constant-current driver circuit
20
. The transistors Q
3
and Q
4
have a size ratio of M:N therebetween. Therefore, the constant-current driver circuit amplifies the reference current Iref provided from the constant-current source
21
in accordance with the size ratio and generates the output current Iout.
FIGS. 3A and 3B
are schematic circuit diagrams of a third constant-current driver circuit
30
of the prior art.
As shown in
FIG. 3A
, the constant-current driver circuit
30
includes a constant-current source
31
, a current mirror circuit
32
, and first and second analog switches
33
,
34
. The first and second analog switches
33
,
34
are connected between the sources of the transistors Q
3
, Q
4
of the current mirror circuit
32
and a low potential power supply VSS, respectively. As shown in
FIG. 3B
, the first and second analog switches
33
,
34
are preferably third and fourth NMOS transistors Q
5
, Q
6
with input signals Sin provided to their gates.
In the constant-current driver circuit
30
, the third and fourth transistors Q
5
, Q
6
are on-off controlled in synchronization with the communication signal S
2
. The reference current Iref provided from the constant-current source
31
is amplified in accordance with the size ratio between the first and second transistors Q
3
, Q
4
, and the output current Iout is provided to the light-emitting diode D
1
.
In the constant-current driver circuits
20
,
30
, the light-emitting diode D
1
emits light or stops the emission by the on-off control of the analog switches
22
,
33
, and
34
, and only when the light-emitting diode D
1
emits light, the reference current Iref flows. Therefore, the increase in the current consumption is prevented.
A MOS transistor has the source, the drain, the gate, and a parasitic capacitance formed between a backgate substrate and the source, the drain and the gate. The value of the parasitic capacitance corresponds to the transistor size. In the constant-current driver circuit
20
, the second transistor Q
4
has parasitic capacitance lager than the first transistor Q
3
.
Thus, when the analog switch
22
is turned on by the transmission signal S
2
, the parasitic capacitance of the transistors Q
3
, Q
4
is charged by the reference current Iref so that the gate voltages of the transistors Q
3
, Q
4
increases. Therefore, time for increasing the gate voltage is determined by the parasitic capacitance, that is, the transistor size. When the switch
22
is turned off, the gate voltages of the transistors Q
3
, Q
4
gradually decrease according to the magnitude of the parasitic capacitance. As a result, the leading edge and the trailing edge of the output current Iout of the constant-current driver circuit
20
grow dull and the high speed emission or stop of the emission of the light-emitting diode D
1
becomes difficult.
When the first and second analog switches
33
,
34
of the constant-current driver circuit
30
are turned on, the gate voltage Vg of the transistors Q
3
or Q
4
is temporarily reduced by the voltage AH as shown in
FIG. 4
, and then, it gradually increases according to the parasitic capacitance. As a result, the leading edge of the output current Iout grows dull, and the high speed emission or stop of the emission of the light-emitting diode D
1
, or the high speed switching operation, becomes difficult. To understand the effects of the parasitic capacitance more easily,
FIG. 4
shows a waveform of the gate voltage Vg when the first analog switch
33
in
FIG. 3A
is turned on, and only the second analog switch
34
is turned on or off by the transmission signal S
2
.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a constant-current driver circuit that on-off controls the output current at a high speed.
In a first aspect of the present invention, a constant-current driver circuit is provided. The constant-current driver circuit includes a first MOS transistor to which a reference current is provided and a second MOS transistor connected to the first MOS transistor for generating an output current having a predetermined ratio to the reference current. A switch circuit is connected to the second MOS transistor for on-off controlling the output current in accordance with the input signal. A bias circuit is connected to the gate of the second MOS transistor for providing a bias voltage to the gate of the second MOS transistor so that variation in the gate voltage

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