Constant current CMOS output driver circuit with dual gate trans

Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage

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327437, G05F 110, G05F 302

Patent

active

059399376

ABSTRACT:
An output driver circuit having an output coupled to a resistive termination load comprises: a dual gate pFET device including source and drain transistors, each transistor respectively having a gate, source, and drain, the source transistor source coupled to a voltage source V, the source transistor drain coupled to the drain transistor source, the drain transistor drain coupled to the output of the driver circuit; a dual gate nFET device including source and drain transistors, each transistor respectively having a gate, source and drain, the source transistor source coupled to a ground potential, the source transistor drain coupled to the drain transistor source, the drain transistor drain coupled to the output of the driver circuit; first and second switches, coupled to the source transistor gate of the pFET device and the nFET device, respectively, for turning on and off current flow from the voltage source V through the source transistor of the pFET device and to the ground potential through the source transistor of the nFET device, respectively; and a bias generator having first and second outputs coupled to the drain transistor gate of the pFET and nFET devices, respectively, and providing first and second bias voltages to the respective drain transistor which are a function of a reference voltage associated with the load and which substantially and respectively control the amount of current provided by the drain transistor of the pFET device to the load and by the load to the drain transistor of the nFET device.

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