Consistent alignment mark profiles on semiconductor wafers using

Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks

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257915, 438401, 438975, H01L 23544

Patent

active

061570877

ABSTRACT:
Provided is a method and composition for protecting alignment mark trench walls from attack by CMP slurry accumulating in an alignment mark trench during CMP processing. In a preferred embodiment, a metal organic chemical vapor deposition titanium nitride (MOCVDTiN) layer is deposited over a conventionally applied bulk tungsten layer prior to commencing CMP operations. This MOCVDTiN layer is resistant to CMP slurry attack. As a result, the tungsten trench profile remains a consistent and reliable alignment mark.

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