Consistent alignment mark profiles on semiconductor wafers using

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature

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H01L 2176

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active

059666137

ABSTRACT:
Provided is a method and composition for protecting alignment mark trench walls from attack by CMP slurry accumulating in an alignment mark trench during CMP processing. In a preferred embodiment, a metal organic chemical vapor deposition titanium nitride (MOCVDTiN) layer is deposited over a conventionally applied bulk tungsten layer prior to commencing CMP operations. This MOCVDTiN layer is resistant to CMP slurry attack. As a result, the tungsten trench profile remains a consistent and reliable alignment mark.

REFERENCES:
patent: 5002902 (1991-03-01), Watanable
patent: 5064683 (1991-11-01), Poon et al.
patent: 5089438 (1992-02-01), Katz
patent: 5270255 (1993-12-01), Wong
patent: 5312512 (1994-05-01), Allman et al.
patent: 5329334 (1994-07-01), Yim et al.
patent: 5464031 (1995-11-01), Buley et al.
patent: 5503962 (1996-04-01), Caldwell
patent: 5532520 (1996-07-01), Haraguchi et al.
patent: 5554561 (1996-09-01), Plumton
patent: 5563090 (1996-10-01), Lee et al.
patent: 5612558 (1997-03-01), Harshfield
patent: 5618381 (1997-04-01), Doan et al.
patent: 5627624 (1997-05-01), Yim et al.
patent: 5672385 (1997-09-01), Jimba et al.
patent: 5686761 (1997-11-01), Huang et al.
patent: 5700383 (1997-12-01), Feller et al.
patent: 5701013 (1997-12-01), Hsia et al.
patent: 5702981 (1997-12-01), Maniar et al.
patent: 5705080 (1998-01-01), Leung et al.
patent: 5717250 (1998-02-01), Schuele et al.
Wolf et al. "Silicon Processing for the VLSI Era vol. 1-Process Technology" p. 198. Lattice Press, Sunset Beack, CA USA, 1986.
Unknown Author, "Thermal Oxidation of Single Crystal Silicon", p. 7, place of publication unknown, date of publication unknown.

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