Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Having substrate registration feature
Patent
1997-09-08
1999-10-12
Bowers, Charles
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Having substrate registration feature
H01L 2176
Patent
active
059666137
ABSTRACT:
Provided is a method and composition for protecting alignment mark trench walls from attack by CMP slurry accumulating in an alignment mark trench during CMP processing. In a preferred embodiment, a metal organic chemical vapor deposition titanium nitride (MOCVDTiN) layer is deposited over a conventionally applied bulk tungsten layer prior to commencing CMP operations. This MOCVDTiN layer is resistant to CMP slurry attack. As a result, the tungsten trench profile remains a consistent and reliable alignment mark.
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Chao Keith K.
Dou Shumay X.
Zhao Joe W.
Bowers Charles
LSI Corporation
Thompson Craig
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