Electrical connectors – With circuit conductors and safety grounding provision – Grounding of coupling part
Reexamination Certificate
2000-05-22
2001-09-11
Paumen, Gary (Department: 2833)
Electrical connectors
With circuit conductors and safety grounding provision
Grounding of coupling part
C439S101000
Reexamination Certificate
active
06287132
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to connectors, and more specifically, to connectors for interconnecting circuit boards.
BACKGROUND
Daughter boards are coupled to a motherboard via sockets, to expand the functionality of the motherboard. For example, the daughter boards may contain memory modules, or other expansion units to the motherboard.
FIG. 1
illustrates a prior art motherboard including daughter boards coupled to the motherboard via sockets. A motherboard
110
includes a plurality of sockets
120
. The sockets
120
are coupled to traces
130
on the motherboard
110
. The traces
130
couple signals together, as is known in the art. A daughter card
140
is designed to be inserted into a socket
120
. The daughter card
140
includes a number of contacts
150
and
160
on both sides of the daughter card
140
. The contacts
150
160
of the daughter card
140
make contact with the socket
120
. The socket
120
connects these contacts
150
and
160
to the traces
130
on the motherboard
110
. The daughter card
140
illustrated has alternating ground contacts
150
and signal contacts
160
on the contact edges of the daughter card
140
.
FIG. 2
illustrates a top view of a prior art socket
120
. The circles
210
,
220
represent the solder holes in the motherboard that receive the pins from the socket. The straight lines
230
represent the contact plane of the daughter board, that is, the area into which the daughter board is inserted. As can be seen, the pins are alternately distal pins and proximal pins. A distal pin is defined as a pin that has its base, the area that contacts the motherboard, far the center of the socket. A proximal pin is defined as a pin that has its base, the area that contacts the motherboard, close to the center of the socket.
The socket includes two parallel rows of pins. The two rows of pins on the socket are arranged to maximize the distance between pins. Thus, each proximal pin faces a distal pin, and each distal pin faces a proximal pin.
The pins are alternately distal pins and proximal pins. Both rows of pins alternate one signal pin
210
and one ground pin
220
. The two rows
230
of pins are arranged such that each distal pin in the first row faces a proximal pin in the second row.
FIG. 3
illustrates two cross sections of the prior art socket
120
. The first cross section
290
is taken at the cross section line
290
in FIG.
2
. The second cross section
295
is taken at the second cross section line
295
in FIG.
2
.
Returning to
FIG. 3
, the first cross section
290
illustrates one distal pin
320
and one proximal pin
310
. For one embodiment, the proximal pin
310
and the distal pin
320
are both ground pins
220
. The daughter board
330
is inserted such that it contacts both the distal pin
320
and proximal pin
310
, one on either side of the daughter board
330
. The contacts on both sides of the daughter board
330
at that cross section
290
are ground contacts
220
.
The second cross section
295
similarly illustrates one distal pin
350
and out proximal pin
360
. In this instance, both the distal pin
350
and proximal pins
360
are signal pins
210
. Again, both pins are in contact with the daughter board
330
, on either side.
FIG. 4
illustrates a prior art pattern of traces on the motherboard. The circles represent contact areas at which the bases of the pins are attached. The G represents “ground,” while the S represents “signal” connections. The first group of contact areas
410
,
420
,
430
,
440
corresponds to a first socket, while the second group of contact areas
450
,
460
,
470
, and
480
corresponds to a second socket. The first signal connection of the first socket is coupled to the first signal connection of the second socket, the second signal connection of the first socket is coupled to the second signal connection of the second socket, and so on. The interconnection is accomplished using traces
130
on the motherboard
110
. The traces
130
are routed to maximize the distance between any two traces.
Closely spaced traces
130
may cause interference in some instances, or actual contact between the traces
130
if the traces are imperfectly fabricated. The trace pattern illustrated in
FIG. 4
is one prior art trace pattern. As can be seen, the trace pattern has two signal traces
130
crossing between two contact areas
440
at location
490
. This is called “two-between routing.” Using “two-between routing” may cause interference between the signals carried by either of the traces. Furthermore, having two traces between the contact areas requires the use of thinner traces, to fit the traces between the contact area spacing. Additionally, thin traces have an increased impedance, that does not match the impedance of the signals from the daughter board. Impedance mismatch causes reflected signals, thus degrading signal integrity and limiting operating frequency. Additionally, the connector size is limited by the constraints of printed circuit board design rules associated with “two-between routing.”
SUMMARY AND OBJECTS OF THE INVENTION
It is an object of this invention to provide a “one-between routing” of traces on the motherboard between parallel sockets.
It is a further object of this invention to provide an improved socket that does not require changing of the daughter board modules designed to be inserted into the socket.
A connection between a motherboard and a daughter board is described. The connector comprises two rows of connector pins, the connector pins in each row alternately distal pins and proximal pins. The proximal pins of the connector carry the signals, while the distal pins are ground or power signals.
Other objects, features, and advantages of the present invention will be apparent from the accompanying drawings and from the detailed description that follows below.
REFERENCES:
patent: 4737116 (1988-04-01), Slye et al.
patent: 4755145 (1988-07-01), Johnson et al.
patent: 4762500 (1988-08-01), Dola et al.
patent: 5116230 (1992-05-01), Dechlette et al.
patent: 5259768 (1993-11-01), Brunker et al.
patent: 5525067 (1996-06-01), Gatti
Nguyen David
Perino Donald
Paumen Gary
Rambus Inc.
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