Connection an integrated circuit on a surface layer of a...

Metal working – Method of mechanical manufacture – Electrical device making

Reexamination Certificate

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C029S832000, C029S831000, C029S846000, C029S847000, C174S262000

Reexamination Certificate

active

07979983

ABSTRACT:
Techniques for optimizing application specific integrated circuit (ASIC) and other IC pin assignment corresponding to a high density interconnect (HDI) printed circuit board (PCB) layout are provided. Applying the techniques described herein, pin assignments may be systematically and strategically planned, for example, in an effort to reduce the PCB layer count and associated cost, increase signal integrity and speed, reduce the surface area used by an ASIC and its support circuitry, reduce plane perforations, and reduce via crosstalk when compared to conventional designs with an ASIC mounted on a multilayered PCB.

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