Multiplex communications – Data flow congestion prevention or control – Flow control of data transmission through a network
Reexamination Certificate
1997-08-28
2001-05-08
Chin, Wellington (Department: 2664)
Multiplex communications
Data flow congestion prevention or control
Flow control of data transmission through a network
C370S230000, C370S412000, C370S418000, C370S395430
Reexamination Certificate
active
06229789
ABSTRACT:
The invention relates to routing switches for the transmission of digital signals and to methods of switching digital signals through routing switches. The invention is particularly applicable to ATM switches and methods of operating ATM switch networks.
BACKGROUND OF THE INVENTION
Data communications in digital form are commonly used for distribution of data between computers and in telecommunications for the transmission of voice signals. Distributed computing systems have used Local Area Networks (LANs) but the requirement to provide wider networks has led to the need for reliable telecommunications networks which can support computer data as well as traditional voice traffic. Existing telephone networks have been designed to transmit voice traffic around the globe and such systems have been optimised for low band width with low latency between sender and receiver although the traffic is relatively insensitive to noise and data errors. Local area networks which have been used for computer communication have generally operated over relatively short distances but require high band width for computer data and in this case the data is not necessarily sensitive to latency but must avoid data errors or omissions. To mix the two communication requirements in a signal network, Broadband Integrated Services Digital Network systems have been proposed and in particular Asynchronous Transfer Mode (ATM) systems have been proposed using small self-routing packets of digital signals.
It is an object of the present invention to provide improved routing switches together with improved methods of switching data packets through a network of routing switches and is particularly applicable to ATM switches and systems.
Reference in this specification to a switch for bi-directional transmission of digital signals means a switch such that when two are connected together each may output a digital signal to the other. Switch
1
may act as a source of digital signals sent to switch
2
acting as a destination while switch
2
may act as a source of digital signals sent to switch
1
acting as a destination. The reference to source and destination may each be intermediate in an extended network of switches.
SUMMARY OF THE INVENTION
The invention provides a routing switch for bi-directional transmission of digital signals, said signals including at least some digital signal cells of at least two types, a first type requiring integrity of cell transmission while accepting variable bit rate of transmission, and a second type accepting some loss of cells in transmission, which switch has a plurality of input ports for receiving input cells from a plurality of sources, a plurality of output ports for outputting output cells to a plurality of destinations, each output port having circuitry to identify a plurality of queues of cells awaiting output by that output port, buffer circuitry selectively connectable to both said input and said output ports for holding a plurality of cells of each type after receipt by an input port and prior to output by an output port, and control circuitry responsive to control bits for each cell (i) to locate any flow control indicator indicating congestion at the source of said cell (ii) to determine whether each input cell is of said first or second type and which output port or ports is to be used and which queue or queues is to be used for each cell, each queue comprising only cells of a single one of said first or second types and each output port having more than one queue of said cells selected from either of said types whereby each port may be used to output a mixture of cells of both types on a common output path, said control circuitry being operable to inhibit output of cells from any queue to a destination for which a flow control indicator has indicated congestion for cells of the type forming the said queue.
Preferably each cell comprises a multi-bit frame with control bits and a data cell, and wherein said control circuitry includes input circuitry for responding to selected control bits forming a path selection identifier to identify which output port or ports is to be used for the cell, and a priority indicator selecting one of a plurality of priorities, said control circuitry further comprising output circuitry to identify a plurality of queues at each output port, said plurality of queues having respective different priorities.
Preferably said input circuitry is responsive to said selected control bits to identify a selected one output port for the switch and a selected destination port for a further switch forming a destination for a cell output from said one output port.
Preferably said output circuitry is responsive to identification by the input circuitry of a said destination port to form a plurality of queues at said one output port each designated for a different destination port.
Preferably said output circuitry is operable to form for a least one priority level, a plurality of queues for different destination ports, and to inhibit output of cells from any queues of said plurality of queues for a destination from which a congestion flow indicator has been input.
Preferably said output circuitry is responsive to flow congestion circuitry to indicate which output ports of the switch are congested and generates flow control indicators for inclusion in the control bits of an output frame to indicate the state of congestion at each of the output ports of the switch.
Preferably said output circuitry is responsive to flow congestion circuitry to indicate congestion for selected types of cell in said buffer circuitry and generates flow control indicators for inclusion in the control bits of an output frame to indicate the state of congestion in said buffer circuitry.
The invention includes a method of transmitting digital signals through a routing switch, said signals including at least some digital signal cells of at least two types, a first type requiring integrity of cell transmission while accepting variable bit rate of transmission and a second type accepting some loss of cells in transmission, which method comprises receiving input cells through a plurality of input ports from a plurality of sources, outputting cells through a plurality of output ports to a plurality of destinations, identifying a plurality of queues of cells awaiting output at each output port, holding a plurality of cells of each type in buffer circuitry after receipt by an input port and prior to output by an output port and responding to control bits in said digital signals (i) to locate any flow control indicator indicating congestion at the source of each cell (ii) to determine whether each input cell is of said first or second type and which output port or ports is to be used and which queue or queues is to be used for each cell, each queue comprising only cells of a single one of said first or second types and each output port having more than one queue of said cells selected from either of said types, whereby each port may output a mixture of cells of both types on a common output path, the output of cells from any queue being inhibited if the queue has a destination for which a flow control indicator has indicated congestion for cells of the type forming said queue.
Preferably each cell comprises a multi-bit frame with control bits and a data cell, using input circuitry in said control circuitry to respond to selected control bits forming a path selection identifier to identify which output port or ports is to be used by the cell, identifying from a priority indicator one of a plurality of priorities for the cell and identifying a plurality of queues at each output port, said plurality of queues having respective different priorities.
The method may include responding to selected control bits to identify a selected one output port for the switch and a selected destination port for a further switch forming a destination for a cell output from said one output port.
Preferably output circuitry forms a plurality of queues at said one output port each designated for a different de
Coppola Marcello
Dumas Pierre
Grenot Thierry
Makoua David Mouen
Moniot Pascal
Chin Wellington
Galanthay Theodore E.
Morris James H.
SGS-Thomson Microelectronics Limited
Tran Maikhanh
LandOfFree
Congestion avoidance in an ATM switch does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Congestion avoidance in an ATM switch, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Congestion avoidance in an ATM switch will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2466523