Multiplex communications – Wide area network – Packet switching
Patent
1990-05-29
1993-05-11
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
370 854, 370 856, 370 941, H04J 302, H04J 324
Patent
active
052107493
ABSTRACT:
Data arranged in packets are transferred between a system memory and a network bus through a SRAM configured by software pointers as first in-first out memories for transmitting (transmit FIFO) and for receiving (receive FIFO). The packets of data stored in the transmit and receive FIFOs are demarked from each other and classified by tag and status bits at the end of the last word of each packet. Data to be transmitted on the network bus is transferred from the system memory to the transmit FIFO, and data received from the network is stored in the receive FIFO. To maximize data throughput, when either at least a predetermined amount of data or a complete packet is stored in the transmit FIFO, the data is transmitted to the network while data is being received from the system memory. When at least a predetermined amount of data is stored in the receive FIFO, data is transferred to the system memory while network data is incoming from the network. One application of the invention is in a Fiber Distributed Data Interface (FDDI).
REFERENCES:
patent: 4635254 (1987-01-01), Tulpule et al.
patent: 4663706 (1987-05-01), Allen et al.
patent: 4866704 (1989-09-01), Bergman
patent: 4878219 (1989-10-01), Kaufman et al.
patent: 4914652 (1990-04-01), Nguyen
patent: 4920534 (1990-04-01), Adelmann et al.
patent: 4930121 (1990-05-01), Shiobara
patent: 4964113 (1990-10-01), Geyer et al.
Advanced Micro Devices , Inc.
Hsu Alpus H.
Olms Douglas W.
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