Miscellaneous active electrical nonlinear devices – circuits – and – Specific identifiable device – circuit – or system – With specific source of supply or bias voltage
Reexamination Certificate
2001-10-05
2003-12-02
Lam, Tuan T. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific identifiable device, circuit, or system
With specific source of supply or bias voltage
C327S543000, C323S315000
Reexamination Certificate
active
06657479
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the electronics and circuit technology fields. More specifically, the invention relates to a configuration with a current source and a switch connected in series with the current source.
A configuration of the generic type is illustrated in FIG.
2
. The circuit of
FIG. 2
contains four transistors P
1
, P
2
, N
1
and N
2
connected in series, and
the first transistor P
1
is a PMOS transistor, whose source terminal is connected to the positive pole VDD of a supply voltage supplying the configuration with power, and which is controlled by a signal icp_refp;
the second transistor P
2
is a PMOS transistor, whose source terminal is connected to the drain terminal of the first transistor P
1
, and which is controlled by a signal upq;
the third transistor N
1
is an NMOS transistor, whose drain terminal is connected to the drain terminal of the second transistor P
2
, and which is controlled by a signal down; and
the fourth transistor N
2
is an NMOS transistor, whose drain terminal is connected to the source terminal of the third transistor N
1
, whose source terminal is connected to the negative pole VSS of a supply voltage supplying the configuration with power, and which is controlled by a signal ipc_refn.
The signal upq controlling the transistor P
2
is the output signal from an inverter INV
1
which is formed by a PMOS is transistor P
3
and an NMOS transistor N
3
and which inverts a signal incr fed to it.
The signal down controlling the transistor N
1
is the output signal from an inverter INV
2
which is formed by a PMOS transistor P
4
and an NMOS transistor N
4
and which inverts the output signal fed to it by an inverter INV
3
which is formed by a PMOS transistor P
5
and an NMOS transistor N
5
and which, for its part, inverts a signal decr fed to it.
The transistors P
1
and N
2
are driven by the signals icp_refp and icp_refn controlling them in such a way that they respectively form a current source, the currents output by these current sources being adjustable to the respectively desired values by way of the signals icp_refp and icp_refn controlling the transistors. For better clarity, the transistors P
1
and N
2
are also designated below as current sources P
1
and N
2
.
The transistors P
2
and N
1
are driven by the signals upq and down (incr and decr) controlling them in such a way that they respectively form a switch. It is thereby possible for these switches to be opened and closed as a function of the signals upq and down, respectively. For better understanding, the transistors P
2
and N
1
are also referred to below as switches P
2
and N
1
.
The configuration has an output terminal O, which is connected to a point lying between the switches P
2
and N
1
and via which an output signal icp is output.
From the above-described construction of the configuration, it becomes clear that the current generated by the current source P
1
, or the current generated by the current source N
2
, or no current is optionally output via the output terminal O. Stated more precisely:
the current generated by the current source P
1
is output if and as long as the switch P
2
is closed (i.e., the transistor P
2
forming the switch is turned on);
the current generated by the current source N
2
is output if and as long as the switch N
1
is closed (i.e., the transistor N
1
forming the switch is turned on); and
no current is output if both switches P
2
and N
1
are open (the transistors P
2
and N
1
forming the switches are off).
The configuration shown in
FIG. 2
is a current source which can be used universally. It is possible, with that current source, to output a current of any desired magnitude for any desired period and at any desired times.
However, this is true only in theory. In practice, problems can occur which restrict the possible uses of the configuration. These problems are that, from time to time, following the closure of the switches P
2
and N
1
, a current is output for a certain time which is higher or lower than the current actually to be output (than the current output by the current sources P
1
or N
2
); experience shows that the current output after the closure of the switches can, for a certain time, be higher or lower by up to several hundred mA than the current actually to be output.
Inter alia, this results in the configuration shown in
FIG. 2
not being usable
if very short current pulses of defined magnitude are needed, for example if a current of 10 mA is needed for a duration of 0.5 ns or less; and/or
if (irrespective of the duration during which the configuration outputs a current) larger deviations of the current output by the configuration from the current actually to be output are impermissible.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a current source and switch configuration, which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and wherein the current output by the configuration is always as large as desired, in particular also immediately after the closure of the switch.
With the foregoing and other objects in view there is provided, in accordance with the invention, a circuit configuration, comprising:
a current source and a current switch connected in series with the current source, the current switch having a current-source side terminal;
a control device configured to ensure that a potential established at the current-source side terminal of the current switch, when the current switch is open, has a value equal to a value the potential would have if the current switch were closed, under otherwise unchanged conditions, and if a current output by the current source were to flow through the current switch.
In other words, the configuration according to the invention is defined by the fact that it contains a control device which ensures that the potential established on the current-source side terminal of the switch, when the latter is open, has the value which it would have if the switch were closed, under otherwise unchanged conditions, and if the current output by the current source were to flow through the switch.
This rules out the situation where the potential established on the current-source side terminal of the switch rises in phases wherein the switch is open. Preventing the potential rise eliminates the cause responsible for an increased current flowing when the switch is closed.
In the case of conventional configurations of the type of
FIG. 2
, during phases wherein the switch is open, a potential rise inevitably occurs on the current-source side terminal of the switch. The reason for this is that the current source also outputs a current after the switch has been opened. The current which continues to flow results in an increased amount of charge accumulating in the section of line running between the current source and the switch, and this in turn results in the potential established there rising. The increased potential, more precisely the increased amount of charge causing this potential increase, has the effect that when the switch is closed, not only does the current output by the current source flow but, in addition, an additional current resulting from the decay of the increased amount of charge, the speed at which the additional current decays depending on the capacitance of the section of line running between the current source and the switch.
The fact that, in the configuration according to the invention, the potential that is established on the current-source side terminal of the switch is brought to a specific value and/or kept at a specific value means that no increased amount of charge can accumulate in the section of line running between the current source and the switch, and, consequently, no additional current can flow either when the switch is closed.
The setting, carried out described, of the potential that is established on the current-source side terminal of the switch means that the conditions are satisfied which must
Greenberg Laurence A.
Infineon - Technologies AG
Mayback Gregory L.
Stemer Werner H.
LandOfFree
Configuration having a current source and a switch connected... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Configuration having a current source and a switch connected..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Configuration having a current source and a switch connected... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3100719