Configuration for testing integrated components

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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Details

C324S1540PB, C324S756010, C324S761010, C439S066000

Reexamination Certificate

active

06278285

ABSTRACT:

BACKGROUND OF THE INVENTION
FIELD OF THE INVENTION
The present invention relates to a configuration for testing integrated components, having a carrier frame into which test bases for receiving the components can be inserted.
Integrated components and in particular memory components are known to be subjected to final tests to check them for perfect operation, before they are handed over to customers. In order to perform those final tests, carrier frames are used, into which test bases that in turn receive the individual memory components can be inserted.
It has now been found that in such existing configurations, contact failures regularly occur, which leads to a reduced yield in the final tests. The currently used test bases also have an average service life on the order of magnitude of only approximately 10,000 contacting operations. After those 10,000 operations, the test configuration must be dismantled n order to replace the original test bases in the carrier frame.
One example thereof that can be mentioned is memory components in a so-called TSOP housing. At a throughput of 4000 DUTs/hr. (DUT stands for Device Under Test, i.e., the test component), the test bases have to be replaced after approximately one week, which means a loss of at least one hour of production. Such a time loss is extremely undesirable with regard to the mass production of integrated components.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a configuration for testing integrated components, which overcomes the hereinafore-mentioned disadvantages of the heretofore-known devices of this general type and in which time losses for replacing test bases are avoidable.
With the foregoing and other objects in view there is provided, in accordance with the invention, a configuration for testing integrated components, comprising a carrier frame; bases for insertion in the carrier frame and for receiving components, the bases having a clamping device for clamping the components and contacts for contacting the components; a tester head for testing the components; and a contact plate associated with the contacts for electrically connecting the components through the contacts and the contact plate to the tester head.
In accordance with another feature of the invention, a spring-loaded hinged lid or a clamping mechanism is used for the clamping device.
Thus, in the configuration of the invention, test bases that are equipped, for instance, with spring-loaded hinged lids are inserted into the carrier frames. However, it is also possible to construct these test bases without a hinged lid and to provide a clamping mechanism instead of the hinged lid.
In accordance with a concomitant feature of the invention, the contacts for the contact plate are SMD contacts (SMD stands for “surface mounted device”) provided on the underside of the test bases, as a result of which secure contacting operations to test boards of the tester head are assured. Contact surfaces or contact pads of the contact plate are optimally adapted to the contacting mechanism including the hinged lid or clamping mechanism, so that no fluctuations in tolerance need be expected for an integrated component inserted into the test base. It has been found that after the integrated components have been inserted into the individual test bases, an extremely reliable contacting with the SMD contacts of the test base is assured. This is attained through the use of the individual hinged lids and/or clamping mechanisms on the top of the test bases, which reliably press the individual components onto the SMD contacts. These contacts then in turn gain a good contact with the gold-coated contact surfaces of the contact plate.
The contact plates are constructed in such a way that they are universally usable. This means that if the housing of an integrated component to be tested is changed, the only item that needs to be replaced is the carrier frames, so that the configuration of the invention is extremely flexible and versatile in terms of its use. The individual test bases in the carrier frame can also be replaced quickly once their service life has ended, so that the production loss entailed by such replacement is extremely slight.
An essential feature of the configuration of the invention is the test bases with the SMD contacts and the universally usable contact plates that fit them. Through the use of short base contacts and conductor tracks, it can also be assured that the configuration according to the invention is especially suited to measuring high frequencies, as can be demanded for memory components in the most varied types of housings.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a configuration for testing integrated components, it is nevertheless not intended to be limited to the details shown, since various modifications and structural changes may be made therein without departing from the spirit of the invention and within the scope and range of equivalents of the claims.
The construction and method of operation of the invention, however, together with additional objects and advantages thereof will be best understood from the following description of specific embodiments when read in connection with the accompanying drawings.


REFERENCES:
patent: 4644269 (1987-02-01), Golder et al.
patent: 4725918 (1988-02-01), Bakker
patent: 5450017 (1995-09-01), Swart
patent: 5652523 (1997-07-01), Noguchi
patent: 5729147 (1998-03-01), Schaff
patent: 5991165 (1999-11-01), Jones, Jr. et al.
patent: 4433906A1 (1995-03-01), None

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