Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion
Reexamination Certificate
2006-11-07
2006-11-07
Young, Brian (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
Digital to analog conversion
Reexamination Certificate
active
07132969
ABSTRACT:
A delay device has at least one first delay element and optional additional delay elements connected downstream from the first in a serially consecutive manner. The digital input signal is connected to an input of the first delay element and is connected to an input of a first D/A converter. The output of the first delay element is connected to an input of another D/A converter assigned thereto. The optional additional delay elements each have outputs connected to an input of another D/A converter assigned to the respective delay elements. All D/A converters are combined on the output side in a step-by-step manner so that output signals of all D/A converters form the analog output signal or the device. A specific coefficient is assigned to each D/A converter, and a specific delay time is assigned to each delay element for realizing a filter characteristic.
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English Abstract for Japanese Published Patent Application 5-145423 published Jun. 11, 1993.
C. Jansson et al., “A 1-MHZ and 16-Bit ΣΔ DAC with a 224th-Order Reconstruction FIR-Filter Using only 9 Nonzero Taps”, ASIC Conference and Exhibit, Sep. 19, 1994, pp. 29-32.
Fuchs Armin
Jelonnek Björn
Wolff Gunter
Siemens Aktiengesellschaft
Staas & Halsey , LLP
Young Brian
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