Configuration control circuit for programmable logic devices

Details Configuration control circuit for programmable logic devices Configuration control circuit for programmable logic devices

1989-05-12

1990-07-10

Hudspeth, David

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

3072021, 307468, 3072722, 3072723, 36518908, 377 64, H03K 19177

Patent

active

049409093

ABSTRACT:
A configuration control circuit in an integrated circuit device, such as a programmable logic device, having a programmable memory for storing configuration bits and one or more shift registers which are loadable from the memory. The memory is an array of nonvolatile memory cells that can be user programmed with data corresponding to a desired device architecture. The shift registers are loaded with this data upon power up or a reset. The registers in combination with other circuit gates control the operation of the device such that a particular architecture is implemented. The various configurations can be tested without altering the contents of the memory by loading the shift register externally.

REFERENCES:
patent: 4366393 (1982-12-01), Kasuya
patent: 4458163 (1984-07-01), Wheeler et al.
patent: 4524430 (1985-06-01), Page
patent: 4536881 (1985-08-01), Kasuya et al.
patent: 4661922 (1987-04-01), Thierbach
patent: 4703206 (1987-10-01), Cavlan
patent: 4706216 (1987-11-01), Carter
patent: 4706217 (1987-11-01), Shimizu et al.
patent: 4713792 (1987-12-01), Hartmann et al.
patent: 4721868 (1988-01-01), Cornell et al.
patent: 4730130 (1988-03-01), Baskett
patent: 4761768 (1988-08-01), Turner et al.
patent: 4763020 (1988-08-01), Takata et al.
patent: 4780628 (1988-10-01), Illman
patent: 4783606 (1988-11-01), Goetting
patent: 4791603 (1988-12-01), Henry
patent: 4866309 (1989-09-01), Banke et al.
Michael J. Allen, "A 6 ns CMOS EPLD with uW Standby Power", Proc. IEEE 1989 Custom Integrated Circuits Conference, May 16, 1989, pp. 5.1.1-5.1.4.
Ronald W. Swartz et al., "A 15 ns 2500 Gate Highly Flexible CHMOS EPLD", Proc. IEEE 1989 Custom Integrated Circuits Conference, May 16, 1989, pp. 5.7.1-5.7.3.

Affiliated with

Also associated with

Rating

Configuration control circuit for programmable logic devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Configuration control circuit for programmable logic devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Configuration control circuit for programmable logic devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1722630