Configuration and test process for semiconductor overcurrent det

Details Configuration and test process for semiconductor overcurrent det Configuration and test process for semiconductor overcurrent det

1998-03-17

1999-06-01

Nguyen, Matthew

Electricity: power supply or regulation systems

Self-regulating

Using a three or more terminal semiconductive device as the...

323225, G05F 156, G05F 316

Patent

active

059091126

ABSTRACT:
A MOSFET integrated circuit device has a main MOSFET, a mirror MOSFET, a current sensing resistor, a reference voltage source, a comparator for detecting an overcurrent condition by comparing a potential at the source of the mirror MOSFET with a reference potential of the reference voltage source, and a control circuit section for turning off the main MOSFET in case of the overcurrent condition. The device further comprises a group of pads allowing a test of the overcurrent detecting function by application of a test current much lower than an overcurrent. The pad group comprises a first pad for measuring the potential at the source of the mirror MOSFET, a second pad for measuring the reference potential and a third pad for detecting a change in the output of the comparator.

REFERENCES:
patent: 5159516 (1992-10-01), Fujihira
patent: 5245523 (1993-09-01), Juzswik
patent: 5559500 (1996-09-01), Kase

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