Configurable real prototype hardware using cores and memory...

Details Configurable real prototype hardware using cores and memory... Configurable real prototype hardware using cores and memory...

2005-12-20

2005-12-20

Phan, Thai (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Emulation

In-circuit emulator

C703S024000, C703S027000, C714S028000, C714S030000

Reexamination Certificate

active

06978234

ABSTRACT:
A method of creating a prototype data processing system, by configuring a hardware development chip (HDC) according to user-defined settings, building user-defined logic adapted to function with the configured development chip, and allowing for the re-configuration of the HDC and user-defined logic after debugging. The HDC has several data processing macros including a processor core macro, a ROM emulation macro, a memory macro, and a bus macro. The macros may be configured by a configuration pin block which is connected to external configuration pins on the HDC. Customer logic is built using a field programmable gate array, which is interconnected with external ports of the HDC. The HDC and customer logic are verified using a debug port on the HDC, which is connected to a debug workstation. The invention allows a user to easily and quickly debug an application-specific integrated circuit (ASIC) design with a unique version of selected processor cores.

REFERENCES:
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patent: 5325512 (1994-06-01), Takahashi
patent: 5768152 (1998-06-01), Battaline et al.
patent: 6032268 (2000-02-01), Swoboda et al.

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