Configurable parallel arithmetic structure for recursive digital

Details Configurable parallel arithmetic structure for recursive digital Configurable parallel arithmetic structure for recursive digital

1977-11-07

1978-09-26

Smith, Jerry

Boots, shoes, and leggings

179 15FD, 333 18, 364726, G06F 1534, H04B 304

Patent

active

041175417

ABSTRACT:
An FDM/TDM transmultiplexer uses sampling rate multiplication to increase the sampling rate for time division multiplexed (TDM) to frequency division multiplexed (FDM) conversion and decrease the sampling rate for FDM to TDM conversion. The rate multiplication filters are realized digitally in order to exploit the computational advantage of Fast Fourier Transform (FFT) algorithm, and channel filtering is implemented by a single time-shared sixth-order elliptic digital recursive filter. A novel FFT processor and recursive filter are disclosed which may be used in the system.

REFERENCES:
patent: 3706076 (1972-12-01), Schuster
patent: 3749895 (1973-07-01), Kao

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