Configurable logic networks

Details Configurable logic networks Configurable logic networks

1995-02-16

1997-01-21

Swann, Tod R.

Boots, shoes, and leggings

364DIG1, 364DIG2, 326 47, G06F 9305

Patent

active

055967663

ABSTRACT:
A programmable logic device (PLD) and configurable logic network in which one or more logic combination networks (LCN) each receives logic inputs from two or more PLDs (PLD1, PLD2) and generates logic outputs (O, P) which provide inputs to programmable selectors (POR, UCL, . . . ) for controlling implementation of logic functions of various types and functionality by a controllable logic function sub-network by routing through the sub-network, logic values and logic instructions originating externally of the PLD's. Each programmable logic device includes an AND logic array (FAND . . . ) having inputs for receiving signals (Ax, Bx) and generating product term output signals and an OR logic array (OG . . . ) having inputs for receiving signals and generating sum term output signals (OF . . . ). One or both of the AND logic and OR logic arrays is programmable and the logic arrays are interconnected to apply output signals from one of them as input signals to the other one, the output from which provides PLD output signals. The logic combination networks may be fixed logic networks (LCN100) or programmable logic function generators (UBLFG2O, UBFF2P) that produce outputs controlled by a set of programmable inputs (CNx, DNx) to the generator as a function of the logic inputs (O,P) received from the programmable logic devices.

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