Configurable logic gate array

Details Configurable logic gate array Configurable logic gate array

1985-06-13

1987-09-01

Eisenzopf, Reinhard J.

Electricity: measuring and testing

Plural, automatically sequential tests

307465, 371 15, G01R 3126

Patent

active

046911618

ABSTRACT:
An integrated circuit having an array of logic gates adapted to provide predetermined logic functions on a plurality of input logic signals fed to the gate array and produce such predetermined logic functions as output signals at a plurality of array output terminals. A plurality of output buffer circuits are coupled between the outputs of an interconnected gate and the array output terminals. A circuit is provided for electrically decoupling each one of the plurality of logic output buffer circuits from the plurality of array output terminals in response to a common control signal. In a preferred embodiment, the control signal is fed to a single one of the plurality of array output terminals. With such arrangement, in response to the control signal, all logic outputs of the gate array are electrically isolated from other components wired to the gate array thereby allowing diagnostic testing of these other components in spite of the fact that they are wired to the gate array. It also allows parametric testing of three-state condition of the buffers required to be three-state buffers by the customer for normal device operation.

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patent: 4527115 (1985-07-01), Mehrotra et al.
patent: 4534008 (1985-08-01), Fuchs et al.

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