Configurable inputs and outputs for memory stacking system...

Details Configurable inputs and outputs for memory stacking system... Configurable inputs and outputs for memory stacking system...

2008-02-14

2009-10-13

Nguyen, Viet Q (Department: 2827)

Static information storage and retrieval

Interconnection arrangements

C257S686000, C257S696000, C438S109000, C361S790000

Reexamination Certificate

active

07602630

ABSTRACT:
Embodiments of the present invention relate to configurable inputs and/or outputs for memory and memory stacking applications. More specifically, embodiments of the present invention include memory devices that include a die having a circuit configured for enablement by a particular signal, an input pin configured to receive the particular signal, and a path selector configured to selectively designate a signal path to the circuit from the input pin.

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Chylak et al.; Packaging Challenges and Solutions for Multi-Stack Die Applications; Semicon West 2002.

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