Conductor track configuration for very large-scale integrated ci

Details Conductor track configuration for very large-scale integrated ci Conductor track configuration for very large-scale integrated ci

1992-05-14

1994-02-22

Wojciechowicz, Edward

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified configuration

257758, 257773, H01L 2348

Patent

active

052890376

ABSTRACT:
A conductor track configuration for very large-scale integrated circuits includes at least two lower conductor tracks extending substantially in a first direction and at least two upper conductor tracks extending substantially in the first direction above the lower conductor tracks. Each of the lower conductor tracks is subdivided into segments, defining gaps between the segments. Each respective one of the segments has one contact leading to the upper conductor track disposed above the one segment. The lower conductor tracks adjacent the segments, as seen in a second direction, have one of the gaps at least in the vicinity of one of the contacts.

REFERENCES:
patent: 4827449 (1989-05-01), Inoue
patent: 4914503 (1990-04-01), Shirato et al.
patent: 5148260 (1992-09-01), Inoue et al.
Siemens Technical Information 11.86 1-Mbit DRAM with CMOS Technology, pp. 1-11, Order No. B2-B3643-X-X-7600.

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