1985-05-28
1987-06-09
Edlow, Martin H.
357 37, H01L 2978
Patent
active
046724079
ABSTRACT:
A conductivity modulated MOSFET, having a semiconductor substrate of a first conductivity type, a semiconductor layer of a second conductivity type formed on the semiconductor substrate and having a high resistance, a base layer of the first conductivity type formed in the semiconductor layer, a source layer of the second conductivity type formed in the base layer, a gate electrode formed on a gate insulating film which is formed on a channel region, the channel region being formed in a surface of the base layer between the semiconductor layer and the source layer, a source electrode ohmic-contacting the source layer and the base layer, and a drain electrode formed on the surface of the semiconductor substrate opposite to the semiconductor layer, characterized in that the conductivity modulated MOSFET has a saturation current smaller than a latch-up current when a predetermined gate voltage is applied to the gate electrode.
REFERENCES:
patent: 4364073 (1982-12-01), Becke et al.
patent: 4532534 (1985-07-01), Ford et al.
Plummer, J. D., and Scharf, B. W., "Insulated Gate Planar Thyristors" Parts I and II, IEEE Transactions on Electron Devices, Feb. 1980.
IEEE Electron Device Letters, vol. EDL-4, 1983, pp. 452-454.
"25 AMP, 500 Volt Insulated Gate Transistors", M. F. Chang et al., 1983 IEEE IEDM Technical Digest, pp. 83-86.
"Improved COMFETs with Fast Switching Speed and High-Current Capability", A. M. Goodman et al., 1983 IEEE IEDM Technical Digest pp. 83-86.
Nakagawa Akio
Ohashi Hiromichi
Thukakoshi Thuneo
Watanabe Kiminori
Yamaguchi Yoshihiro
Crane Sara W.
Edlow Martin H.
Kabushiki Kaisha Toshiba
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