Patent
1986-04-30
1987-08-25
Clawson, Jr., Joseph E.
357 38, 357 43, 357 86, 357 15, H01L 2978
Patent
active
046896473
ABSTRACT:
A COM switching device includes an n.sup.+ -type layer formed on a p.sup.+ -type layer, p.sup.+ -type regions formed in the surface areas of an n.sup.- -type layer formed on the n.sup.+ -type layer, n.sup.+ -type regions formed in the surface areas of the p.sup.+ -type regions, and a gate electrode formed on an insulating layer over the surface areas of the p.sup.+ -type regions which lie between the n.sup.+ -type regions and the n.sup.- -type layer. The n.sup.+ -type layer is formed such that the amount of impurities per unit area is 5.times.10.sup.13 cm.sup.-2 or more.
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L. Goldmann et al., "Lead-Indium For Joining A Semiconductor Chip To A Substrate," IBM Tech. Discl. Bull., vol. 16 #11, Apr. 1974, pp. 3610-3611.
B. Baliga et al., "Improving Reverse Recovery . . .," Solid-State Electronics, vol. 26, #12, 1983, pp. 1133-1141.
"The Insulated Gate Rectifier" B. J. Baliga et al. 1982 IEEE IEDM Technical Digest, pp. 264-267, Dec. 1982.
Nakagawa Akio
Ohashi Hiromichi
Clawson Jr. Joseph E.
Kabushiki Kaisha Toshiba
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