Conductivity-enhanced combined lateral MOS/bipolar transistor

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357 238, 357 13, 357 35, 357 41, 357 43, H01L 2978, H01L 2704, H01L 2972

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active

046099298

ABSTRACT:
A combined lateral MOS/bipolar transistor includes an intermediate semiconductor layer of the same conductivity type as the channel region which extends laterally from the channel region to beneath the drain contact region of the device. Additionally, a floating semiconductor layer of opposite conductivity type to that of the channel region is provided between the intermediate layer and the substrate of the device. Both the intermediate layer and the substrate are relatively lightly doped, to effectively isolate the floating layer from above and below. This structure substantially improves the operating chartacteristics of the device, thus permitting operation in both the source-follower and common-source modes, while also providing a compact structure which features a relatively low normalized "on" resistance.

REFERENCES:
patent: 4048649 (1977-09-01), Bohn
patent: 4300150 (1981-11-01), Colak
patent: 4344081 (1982-08-01), Pao et al.

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