Conductivity connected charge-coupled device fabrication process

Details Conductivity connected charge-coupled device fabrication process Conductivity connected charge-coupled device fabrication process

1975-03-03

1976-01-06

Rutledge, L. Dewayne

Metal treatment

Compositions

Heat treating

148187, 357 91, H01L 21263

Patent

active

039308936

ABSTRACT:
A method of fabricating conductivity connected charge-coupled devices (C4D's) is disclosed wherein N+ barriers are ion-implanted in an N-type substrate and wherein P++ conductivity connecting regions are formed by diffusion of impurity atoms into the substrate. The process is compatible with the known silicon gate process, enabling semiconductor devices of other types and with different thresholds to be formed on the substrate at the same time the C4D's are fabricated.

REFERENCES:
patent: 3650019 (1972-03-01), Robinson
patent: 3852119 (1974-12-01), Gosney et al.
patent: 3853634 (1974-12-01), Amelio et al.
patent: 3865652 (1975-02-01), Agusta et al.
patent: 3892596 (1975-07-01), Bjorklund et al.
1973 International Elec. Dev. Meeting, Tech. Digest, "A High Density Overlapping Gate C.C.D. Array," Bower et al., pp. 30-32.

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