Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
1999-01-13
2002-10-29
Cuneo, Kamand (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C361S808000
Reexamination Certificate
active
06472611
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to an improved method of surface mounting integrated circuit package, more specifically a leadless chip carrier, to a printed wiring board.
BRIEF DESCRIPTION OF THE PRIOR ART
This invention relates to an improvement in the surface mounting of an integrated circuit package, more specifically a leadless chip carrier, to a printed wiring board.
A leadless chip carrier is an integrated circuit package which includes a ceramic substrate on which there is provided a pattern of contact pads. A corresponding pattern of contact pads is provided on the printed wiring board. When the leadless chip carrier is mounted to the printed wiring board, the contact pads are electrically interconnected.
Various approaches to the mounting and electrical connection of the leadless chip carrier to printed wiring board have been proposed and implemented in the past. All of the known approaches are disadvantageous for one or more reasons. One approach is to provide a connector socket for receiving the leadless chip carrier on the printed wiring board. This approach is relatively expensive.
Another mounting approach is the use of a Chip Carrier Mounting Device (a trademark of Raychem Corp.) which is an array of high temperature solder wire leads having an embedded helical copper braid. The array is held in place by an dissolvable carrier which is temporary; the carrier being used to facilitate alignment of the wire leads to the contact pads of the leadless chip carrier. The carrier is removed after the leads are soldered to the leadless chip carrier. Disadvantages of this approach include the use of the temporary carrier which has a limited shelf life and is adversely affected by humidity. Additionally, this approach requires custom design which adds to the expense.
Another approach is the use of edge clips which are created from metal stampings and are available on continuous reels. The edge clips are intended to clip onto the edge of the leadless chip carrier using a spring retention mechanism. Some disadvantages are that they do not fit many leadless chip carrier package and they are frequently difficult to assemble to leadless chip carriers. Additionally, the use of edge clips results in excessively high stand off of the leadless chip carriers from the printed wiring board which reduces the packing density.
Yet another approach is the use of a lead wire array which provides pre-leading of a leadless chip carrier for subsequent solder assembly to a printed wiring board. The lead wire assembly is formed from a length of bare wire which is first bent into a planar serpentine shape. The bending results in a plurality of parallel segments which correspond to spacing of the contact pads. Portions of the parallel segments are flattened in order to provide a larger contact area for solder connection at the contact pads. The parallel segments in the first plane are then attached to the respective contact pads on the leadless chip carrier and the parallel segments in the second plane are attached to respective contact pads on the printed wiring board. The reversing segments of the wire are removed to eliminate short circuits between the contact pads. Some disadvantages of this technique are that it is labor intensive, results in an assembly that is difficult to clean and stand off devices are required to prevent collapse onto the printed wiring board.
The most widely used approach is to directly solder the contact pads of the leadless chip carrier to the contact pads of the printed wiring board. Since the leadless chip carriers have a ceramic substrate, they have a lower coefficient of thermal expansion than printed wiring boards which are typically used in the industry. Therefore unless the thermal expansion coefficient of the printed wiring board matches that of the leadless chip carrier, a reliability problem ensues as a result of excessive thermal-mechanical stresses placed on the solder joints. The use of component stand off devices to secure a separation of defined height has been shown to minimize the problem of thermal mismatch. This technique is used routinely. In this technique, solder masks are used to build stand off devices on the printed wiring board. Typically one stand off device per side of the leadless chip carrier is required and they must adhere to strict requirements for height, as well as for spacing between the stand off devices and contact connections. Fabrication of said solder mask devices is both time consuming and expensive.
SUMMARY OF THE INVENTION
It is the object of this present invention to provide an approach to control the separation between leadless chip carriers and printed wiring boards by forming stand off devices. Said devices are provided by mounting conductive pedestals within the contact pad areas. This approach is economical and does no have the disadvantages of the techniques described above.
In accordance with the present invention, there is provided a reliable, flexible and low cost method of assembly to control the separation between leadless chip carriers and printed wiring boards. This approach is used in conjunction with directly soldering the contact pads of the leadless chip carriers to the contact pads of the printed wiring boards. Such a separation is necessary to avoid overstressing the solder joints which provide electrical and mechanical connection between the two members. Further, this separation supports cleaning of fluxes or other contaminants which may deteriorate reliability and/or support formation of short circuits between contact areas. The foregoing and additional objects are attained by providing conductive pedestals within the solder pad area. The conductive pedestal comprises an electrically conductive material of controlled dimensions which set the stand off height. Further, the conductive pedestals retain standoff dimensions within the specification during and subsequent to the solder reflow process. Volume of the conductive pedestal is small with respect to that of the solder column which connects the chip carrier and printed circuit board and does not significantly alter the properties of said connectors. Said pedestal is compatible with the solder used for connecting the contacts of the leadless chip carrier and those of the printed wiring board.
The conductive pedestals are attached to contact pads of either the leadless chip carriers or to those of the printed wiring boards prior to embedding in the connecting solder columns.
In order to maintain the required coplanarity between chip carrier and board, conductive pedestal size is controlled, and the pedestals must be located so that the package will be maintained parallel to the printed wiring board; typically at least one conductive pedestal is necessary on each side of the package. Additional pedestals provide redundancy which can further insure control of the stand off height coplanarity.
Further, because the conductive pedestals are contained within the area of the solder column, they add no interference for cleaning between the connectors, but they do aid in the cleaning efficiency as a result of the standoff provided between chip carrier and board.
Solders, alloys, metals or composites which are conductive are acceptable materials for conductive pedestals, so long as they are compatible with eutectic solder and maintain dimensional stability during solder reflow.
The invention herein comprises a method to transfer conductive pedestals to the contact pads. The precise location of the small pedestals on the contact pads is not critical. One method which is readily automated, high speed, low cost and is compatible with current manufacturing techniques provides for transfer of preformed spheres.
The spheres when attached to contact pads form conductive pedestals. This method comprises forming an array of patterned areas which register to a location for conductive pedestals. One conductive pedestal sphere is captured per area and retained until the spheres are aligned to the receiving pads. The preferred method for forming the patterned
Brady III W. James
Cuneo Kamand
Norris Jeremy
Texax Instruments Incorporated
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