Conductive mesh bias connection for an array of elevated...

Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Electromagnetic or particle radiation

Reexamination Certificate

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Details

C257S458000, C257S656000, C257S290000, C257S291000, C257S059000, C257S072000

Reexamination Certificate

active

06396118

ABSTRACT:

FIELD OF INVENTION
This invention relates generally to photo diode active pixel sensors. In particular it relates to a conductive mesh bias connection for an array of elevated active pixel sensors which provides light shielding between the active pixel sensors.
BACKGROUND
An array of image sensors or light sensitive sensors detect the intensity of light received by the image sensors. The image sensors typically generate electronic signals that have amplitudes that are proportionate to the intensity of the light received by the image sensors. The image sensors can convert an optical image into a set of electronic signals. The electronic signals may represent intensities of colors of light received by the image sensors. The electronic signals can be conditioned and sampled to allow image processing.
Integration of the image sensors with signal processing circuitry is becoming more important because integration enables miniaturization and simplification of imaging systems. Integration of image sensors along with analog and digital signal processing circuitry allows electronic imaging systems to be low cost, compact and require low power consumption.
Historically, image sensors have predominantly been charged coupled devices (CCDs). CCDs are relatively small and can provide a high-fill factor. However, CCDs are very difficult to integrate with digital and analog circuitry. Further, CCDs dissipate large amounts of power and suffer from image smearing problems.
An alternative to CCD sensors are active pixel sensors. Active pixel sensors can be fabricated using standard CMOS processes. Therefore, active pixel sensors can easily be integrated with digital and analog signal processing circuitry. Further, CMOS circuits dissipate small amounts of power.
FIG. 1
shows a cross-section of a prior art array of image sensors. This array of image sensors includes PIN diode sensors located over a substrate
10
. An interconnection structure
12
electrically connects an N-layer
14
of the PIN diodes to the substrate
10
. An I-layer
16
is formed over the N-layer
14
. A P-layer
18
is formed over the I-layer
16
. The P-layer
18
, the I-layer
16
and the N-layer
14
form the array of PIN diode sensors. A first conductive via
20
electrically connects a first diode sensor to the substrate
10
, and a second conductive via
22
electrically connects a second diode sensor to the substrate
10
. A transparent conductive layer
24
is located over the array of diode sensors. A conductive lead
26
is connected to the transparent conductive layer
24
. The conductive lead
26
is connected to a bias voltage which allows biasing of the P-layer
18
of the array of PIN diode sensors to a selected voltage potential.
A limitation of the image sensor structure of FIG. I is the lack of shielding between the image sensors. Light received by a given sensor is also received by a neighboring sensor because there is no shielding of light between neighboring sensors. Light received by a given image sensor will also effect neighboring image sensors because current can flow through the N-layer
14
between neighboring image sensors. Charge can flow between the image sensors especially when the light intensity of the received light varies greatly between neighboring image sensors. The P-layer
18
, the I-layer
16
and the N-layer
14
are shared by neighboring image sensors. A trench
28
is formed to provide some isolation between the image sensors by increasing the resistance between the N-layers sections of neighboring image sensors.
Another limitation of the image sensor structure of
FIG. 1
is the electrical connection between the conductive lead
26
and the transparent conductive layer
24
. The transparent conductive layer
24
must be electrically conductive to allow biasing of the PIN diodes, and must be transparent to allow the PIN diodes to receive light. Generally, it is very difficult to bond to the types of materials that must be used to form the transparent conductive layer
24
. Therefore, the conductive lead
26
must be attached to the transparent conductive layer
24
with the aid of some type of clamp or support structure. The result being an electrical connection which is not reliable and which is expensive to produce.
It is desirable to have an array of active pixel sensors formed adjacent to a substrate in which light received by an active pixel sensors of the array is shielded from the other active pixel sensors of the array. That is, it is desirable that isolation exist between the active pixel sensors which reduces the effect that light received by an active pixel sensor of the array has on the other active pixel sensors of the array. It is also desirable that the active pixel sensor array include a conductive layer that provides a bias voltage to the array of active pixel sensors, and that is reliably electrically connected to a pixel sensor bias voltage which originates on the substrate.
SUMMARY OF THE INVENTION
The present invention is an array of elevated active pixel sensors formed adjacent to a substrate that includes a conductive mesh that is reliably electrically connected to the pixel sensors and a pixel sensor bias voltage which is located on the substrate. The conductive mesh provides shielding of light received by each pixel sensor from the other pixel sensors. That is, the conductive mesh provides isolation between the active pixel sensors which reduces the effect that light received by an active pixel sensor of the array has on the other active pixel sensors of the array. The conductive mesh provides a bias voltage to the array of active pixel sensors. The substrate can be a CMOS substrate which includes image processing circuitry.
A first embodiment of this invention includes an array of active pixel sensors. The array of active pixel sensors includes a substrate. An interconnect structure is formed adjacent to the substrate. The interconnect structure includes a plurality of conductive vias. A plurality of photo sensors are formed adjacent to the interconnect structure. Each photo sensor includes a pixel electrode. Each pixel electrode is electrically connected to the substrate through a corresponding conductive via. An I-layer is formed over each of the pixel electrodes. The array of active pixel sensors further includes a conductive mesh formed adjacent to the photo sensors. An inner surface of the conductive mesh is electrically and physically connected to the photo sensors, and electrically connected to the substrate through a conductive via.
A second embodiment of this invention is similar to the first embodiment. The second embodiment includes the conductive mesh providing light shielding between photo sensors thereby reducing cross-talk between the photo sensors.
A third embodiment of this invention is similar to the second embodiment. The third embodiment includes apertures of the conductive mesh aligning with at least one of the pixel electrodes of the photo sensors.
A fourth embodiment of this invention is similar to the first embodiment, but further includes a P-layer formed between the I-layer and the conductive mesh. The inner surface of the conductive mesh is electrically connected to the P-layer and the interconnect structure.
Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.


REFERENCES:
patent: 4745451 (1988-05-01), Webb et al.
patent: 5076670 (1991-12-01), Sayyah
patent: 5235195 (1993-08-01), Tran et al.
patent: 5578837 (1996-11-01), Jackson et al.
patent: 5936230 (1999-08-01), Street
patent: 5936261 (1999-08-01), Ma et al.
patent: 6018187 (2000-01-01), Theil et al.
patent: 6069365 (2000-05-01), Chow et al.
patent: 6215164 (2001-04-01), Cao et al.
patent: 6229191 (2001-05-01), Cao et al.
patent: 04216670 (1992-08-01), None

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