Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2006-03-06
2008-10-21
Le, Thao P. (Department: 2818)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C438S257000
Reexamination Certificate
active
07439082
ABSTRACT:
A conductive memory stack is provided. The memory stack includes a bottom electrode, a top electrode and a multi-resistive state element that is sandwiched between the electrodes. The bottom electrode can be described as having a top face with a first surface area, the top electrode has a bottom face with a second surface area and the multi-resistive state element has a bottom face with a third surface area and a top face with a fourth surface area. The multi-resistive state element's bottom face is in contact with the bottom electrode's top face and the multi-resistive state element's top face is in contact with the top electrode's bottom face. Furthermore, the fourth surface area is not equal to the second surface area.
REFERENCES:
patent: 3886577 (1975-05-01), Buckley
patent: 5296716 (1994-03-01), Ovshinsky et al.
patent: 6249014 (2001-06-01), Bailey
patent: 6473332 (2002-10-01), Ignatiev et al.
patent: 6487106 (2002-11-01), Kozicki
patent: 6531371 (2003-03-01), Hsu et al.
patent: 6657888 (2003-12-01), Doudin et al.
patent: 6731528 (2004-05-01), Hush et al.
patent: 6753561 (2004-06-01), Rinerson et al.
patent: 6807088 (2004-10-01), Tsuchida
patent: 6825489 (2004-11-01), Kozicki
patent: 6836421 (2004-12-01), Rinerson et al.
patent: 6856536 (2005-02-01), Rinerson et al.
patent: 6897532 (2005-05-01), Schwarz et al.
patent: 7002197 (2006-02-01), Perner et al.
patent: 2002/0020836 (2002-02-01), Kikuchi et al.
patent: 2003/0132456 (2003-07-01), Miyai et al.
patent: 2004/0141369 (2004-07-01), Noguchi
patent: 2004/0233708 (2004-11-01), Hsu et al.
patent: 2004/0235247 (2004-11-01), Hsu et al.
patent: 2005/0070043 (2005-03-01), Yamakawa et al.
patent: 2005/0079735 (2005-04-01), Higuchi et al.
patent: 2005/0135148 (2005-06-01), Chevallier et al.
patent: 2005/0151156 (2005-07-01), Wu et al.
patent: 2005/0167715 (2005-08-01), Higuchi et al.
patent: 2005/0201146 (2005-09-01), Moore et al.
patent: 2005/0207265 (2005-09-01), Hsu et al.
patent: 2006/0023495 (2006-02-01), Rinerson et al.
patent: 2007/0120124 (2007-05-01), Chen et al.
U.S. Appl. No. 60/536,115, filed Jan. 13, 2004, Wu et al.
A.Baikalov, et al, “Field -driven hysteretic and reversible resistive switch at the Ag-Pr0.7Ca0.3MnO3 interface” Applied Physics Letters, vol. 83, No. 5, Aug. 4, 2003, pp. 957-959.
A. Sawa, et al, “Hysteretic current-volyage characteristics and resisitance switching at a rectifying Ti/Pr0.7Ca0.3MnO3interface” Applied Physics Letters, vol. 85, No. 18, Nov. 1, 2004, pp. 4073-4075.
David Oxley, “Memory Effects in Oxide Films” in Oxides and Oxide Films, vol. 6, pp. 251-325 (Chapter 4) (Ashok. K. Vijh ed., Marcel Drekker) (1981).
J.G. Simmons and R.R. Verderber, “New Conduction and Reversible Memory Phenomena in Thin Insulating Films,” Proc. Roy. Soc. A., 301 (1967), pp. 77-102.
R.E. Thurstans and D.P. Oxley, “The Electroformed metal-insulator-metal structure: A comprehensive model,” J. Phys. D.: Appl. Phys. 35 (2002), Apr. 2, 2002, pp. 802-809.
Hsia Steve Kuo-Ren
Longcor Steven W.
Rinerson Darrell
Le Thao P.
Unity Semiconductor Corporation
LandOfFree
Conductive memory stack with non-uniform width does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Conductive memory stack with non-uniform width, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Conductive memory stack with non-uniform width will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4007967