Conducting path with two different end characteristic...

Details Conducting path with two different end characteristic... Conducting path with two different end characteristic...

2000-01-05

2002-07-16

Bettendorf, Justin P. (Department: 2817)

Wave transmission lines and networks

Coupling networks

With impedance matching

C333S034000, C257S611000

Reexamination Certificate

active

06420943

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor circuits and, more particularly, to the conducting paths and conducting traces that transmit signals between semiconductor components and/or groups of semiconductor components.
2. Description of the Related Art
As data processing systems and components have been designed for ever increasing power, one of the parameters used to effectuate the more powerful systems and the components implementing the systems is the frequency of the system clock. As the frequency of the system clock has been increased, some frequency-dependent parameters, having a deleterious effect on the performance of the data processing system, have become important.
Referring to
FIG. 1
, a signal transmitter/receiver configuration, typically found in an semiconductor circuit, is illustrated. P-type metal-oxide semiconductor, field-effect transistor (MOSFET)
12
and n-type MOSFET
14
are coupled in series and have input signals applied to the gate terminals thereof. Transistors
12
and
14
apply signals, determined by the input signals to transistor
12
and transistor
14
, to conducting path
11
, conducting path
11
being coupled to the junction of the source/drain terminals. Conducting path
11
conducts the signal to the gate electrodes of p-type MOSFET
16
and n-type MOSFET
18
, the transistors
16
and
18
being coupled in series. The output signal is applied to the source/drain junction of transistors
16
and
18
. As the frequency of the processing system clock is increased, any mismatch of the output impedance of the transmitting transistor pair
12
,
14
and the input impedance of the receiving transistor pair
16
,
18
becomes increasingly important. The mismatch in impedance would be reflected in an increased noise in the transmitted signal, the increased noise arising, at least in part, from signal reflections resulting from the mismatched impedances.
In order to reduce the effect of a mismatch in impedance between the transmitting transistor pair
12
,
14
and the receiving transistor pair
16
,
18
, one prior art technique involves the reduction of the mismatch by the adjustment of the parameters of the transistors themselves. In this technique, the transistor variables, such as geometrical dimensions, doping levels, doping dimensions, etc. are adjusted during the semiconductor fabrication process to provide impedances in the transmitting circuit and in the receiving circuit. Because the transistor parameters are not independent, this technique has limited flexibility. In addition, transistor parameters are typically optimized for performance, and departures from the optimized parameters may result in an unacceptable penalty in performance.
Another technique to reduce the transmitting unit/receiving unit impedance mismatch is to add a physical component, for example as shown in FIG.
2
. In this Figure, the circuit shown in
FIG. 1
is repeated. In addition, impedance
21
has been added to the input circuit of the receiving transistor pair
16
,
18
. While this additional circuit element can improve the impedance mismatch, the impedance
21
can result in lower response time, i.e., can result in a performance penalty.
As the frequency is increased, a further complication arises. When the transmitting unit and the receiving unit are coupled by a conducting path longer than a wavelength apart, the impedance seen be either component is the intrinsic impedance of the conducting path itself. This intrinsic impedance is typically referred to as the characteristic impedance and is denoted by “Z”. Thus, for high frequencies, a potential impedance mismatch can occur not just between a transmitting unit and a receiving unit, but between the transmitting unit and the conducting path and between the conducting path and the receiving unit.
A need has therefore been felt for a technique for improving the impedance match between the impedance of a signal transmitting circuit and the impedance of the corresponding signal receiving circuit. One feature of this technique would be that the parameters of the semiconductor components would not be altered. Another feature of the present invention would be that the performance of the transmitting/receiving circuit would not be compromised. A further feature would be that the improvement in the impedance mismatch would involve the conducting path coupling the transmitting unit and the receiving unit.
SUMMARY OF THE INVENTION
The aforementioned and other features are accomplished, according to the present invention, by adjusting the parameters of a conducting path so that the characteristic impedance of a first portion of the conducting path coupled to a transmitting circuit matches an output impedance of the transmitting circuit and the characteristic impedance of a second portion of the conducting path coupled to a receiving circuit matches the input impedance of the receiving circuit. A middle portion of the conducting path provides a relatively smooth transition from the parameters of the first portion of the conducting path to the parameters of the second portion of the conducting path. In the preferred embodiment, the geometry of the conducting path is selected such that the characteristic impedances of the first and second portions of the conducting path have appropriate characteristic impedances at the operating clock frequency. In particular, the width of the conducting path is selected for adjustment, this parameter being particularly convenient to control in the fabrication of circuit boards. Other parameters of the conducting path such as composition or doping levels can also be controlled. These parameters can be used to reduce the mismatch of impedances when an actual impedance match is not possible.


REFERENCES:
patent: 3419813 (1968-12-01), Kamnitsis
patent: 5111157 (1992-05-01), Komiak
patent: 5774093 (1998-06-01), Schiltmans
patent: 6107119 (2000-08-01), Farnworth et al.

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