Conditioning circuit for use with I.sup.2 L and ISL logic arrays

Details Conditioning circuit for use with I.sup.2 L and ISL logic arrays Conditioning circuit for use with I.sup.2 L and ISL logic arrays

1979-04-05

1981-05-19

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

With nonswitching means responsive to external nonelectrical...

Temperature responsive

307296A, 307254, 307DIG1, 328 48, H03K 301, H03K 513

Patent

active

042687632

ABSTRACT:
Two independent power supplies for an I.sup.2 L or ISL logic array can be timed to turn on at different times by a simple RC network connected externally of the logic array. The differential timing is utilized to condition or set a bistable device in a predetermined initial desired state, without requiring an additional device terminal pin for that purpose.

REFERENCES:
patent: 3560767 (1971-02-01), Traub
patent: 3703648 (1972-11-01), Wrabel
patent: 3732442 (1973-05-01), Husbands et al.
patent: 4001609 (1977-01-01), Sickert
patent: 4013902 (1977-03-01), Payne
patent: 4045688 (1977-08-01), Stewart
patent: 4103187 (1978-07-01), Imamura
patent: 4155014 (1979-05-01), Tung
Hanchett, "Turn-On Reset Circuits", RCA Tech. Nte. TN No. 927, 3/28/73, 4 pp.

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