Conditioning circuit for selectively buffering an input...

Details Conditioning circuit for selectively buffering an input... Conditioning circuit for selectively buffering an input...

2002-10-03

2004-02-24

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

C341S143000

Reexamination Certificate

active

06697006

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a conditioning circuit for selectively buffering an input signal to a signal processing circuit for subsequent processing thereof, and in particular though not limited to a conditioning circuit for selectively buffering an input signal to an analog-to-digital converter. The invention also relates to a signal processing circuit comprising the conditioning circuit, and to an analog-to-digital converter circuit comprising the conditioning circuit.
In this specification the terms differential and pseudo-differential are used in connection with input signals. Differential signals are of the type which require two terminals per signal, since the signal is represented as the difference between the voltages on two terminals. The two terminals are respectively referred to as the positive and negative terminals. An example of a differential signal, is one which is sourced from a circuit of bridge configuration where the differential signal swings around a mid-point or reference voltage of V
bridge
/2, where V
bridge
is the voltage applied to the bridge, The voltages of a differential signal generally do not approach the respective supply rail voltages of a circuit, and have a source impedance arising from resistors which form the bridge circuit. Pseudo-differential signals are signals which share a common terminal, which may be negative or positive but generally is negative. Thus, pseudo-differential signals require N+1 terminals per N signals. Commonly, pseudo-differential signals are also referred to as single-ended signals. Additionally, in this specification a reference to a positive signal is intended to mean a reference to the signal applied to the positive terminal, and a reference to a negative signal is intended to mean a reference to the signal applied to the negative terminal. For differential signals the term positive or negative is a convention, rather than being indicative of polarity. If the positive signal is greater than the negative signal, then the differential signal has a positive polarity, Conversely, if the positive signal is less than the negative signal, the differential signal has a negative polarity. For pseudo-differential signals, the negative signal is normally at or close to ground, and the positive signal is above the negative signal, thus giving a pseudo-differential signal of positive polarity.
BACKGROUND TO THE INVENTION
Signal processing circuits, for example, analog-to-digital converter (ADC) circuits, and in particular, sigma-delta ADC circuits, in general, present a low impedance to an input signal to be processed when applied to input terminals of the ADC circuit. This causes current to flow to or from the input terminals of the ADC circuit, thus leading to a change in voltage of the input signal. This is a particularly serious problem where the input signal is derived from a high impedance source, which is high relative to the impedance presented by the ADC circuit. Any significant change in the voltage of an input signal when it is applied to an ADC circuit or other signal processing circuit is undesirable,
Buffers are commonly used to overcome this problem. A buffer presents a high impedance to an input signal, and buffers are selected so that the input impedance of the buffer is high relative to that of the source impedance of the input signal, thus, leading to minimal change in the voltage of the input signal when applied to the buffer. However, buffers suffer from a number of disadvantages. They tend to add noise and other distortions to the input signal, and the output voltage from a buffer may be offset from the input voltage. Most importantly, buffers in general, can only operate over a limited input voltage range, They are unsuitable for buffering input signals the voltage of which is relatively close to either the positive or negative supply voltage to the buffer. Where the voltage of an input signal is relatively close to the positive or negative supply voltage to the buffer the problems of noise and distortion as well as voltage offset become unacceptable. Indeed, in general, the problem of noise, distortion and voltage offset occurs over a voltage range which is close to one of the positive or negative supply voltages of the buffer, rather than the other. In other words, buffers, in general, can operate with input signal voltages closer to one of the supply voltages of the buffer than the other supply voltage. This, in general, results from the type of transistors with which the input stage of the buffer is implemented. If the input stage of the buffer is implemented in PMOS transistors, the voltage range, over which the buffer can operate, in general, extends doser to the negative supply voltage of the buffer than to the positive supply voltage, and vice versa when the input stage is implemented in NMOS transistors. In other words, when the input stage is implemented in NMOS transistors, the voltage range, over which the buffer can operate, in general, extends closer to the positive supply voltage of the buffer than to the negative supply voltage.
Where a differential input signal is buffered to an ADC circuit, the problems which have just been discussed relating to buffers may not arise, since the positive and negative component signals of the differential signal vary on either side of a reference voltage, which can be selected to lie in the middle of the operating voltage range of the buffer, and the buffer can be selected so that the positive and negative voltage extremes of the positive and negative component signals of the differential signal remain within the operating voltage range of the buffer. However, where an ADC circuit, or indeed any other signal processing circuit must be capable of handling both differential signals, and pseudo-differential signals, and the common voltage of the pseudo-differential signals is relatively close to one or other of the positive or negative supply voltage of the buffer, buffering of the respective input signals is unsatisfactory. This is due to the fact that the buffered output of the common input signal will be unsuitable for further processing as a result of noise, distortion and/or voltage offset introduced by the buffer.
There is therefore a need for a conditioning circuit for selectively buffering an input signal to an ADC circuit, and indeed, to other signal processing circuits for processing the input signals, which overcomes these problems.
The present invention is directed towards providing such a conditioning circuit, as well as a signal processing circuit and an ADC circuit both of which comprise the conditioning circuit.
SUMMARY OF THE INVENTION
According to the invention there is provided a conditioning circuit for selectively buffering an input signal to a signal processing circuit, the conditioning circuit comprising:
a buffer circuit for receiving and buffering the input signal,
a bypass circuit for receiving the input signal, and for bypassing the buffer circuit, and
a control circuit for selecting one of the buffer circuit and the bypass circuit for passing the input signal to the signal processing circuit, so that the input signal is applied to the signal processing circuit through the bypass circuit when the voltage of the input signal falls outside the operating voltage range of the buffer circuit.
In one embodiment of the invention a plurality of input signals are selectively applied to the conditioning circuit, and the control circuit is responsive to which of the input signals is selected for selecting the one of the buffer circuit and the bypass circuit. Preferably, the signals are applied to the conditioning circuit in response to a select signal, and the control circuit is responsive to the select signal for selecting the one of the buffer circuit and the bypass circuit.
In another embodiment of the invention the control circuit is responsive to the input signal for selecting the one of the buffer circuit and the bypass circuit
In another embodiment of the invention the control circuit is responsive

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