Conditional truncation indicator control for a decimal numeric p

Details Conditional truncation indicator control for a decimal numeric p Conditional truncation indicator control for a decimal numeric p

1997-11-17

1999-11-30

Kim, Kenneth S.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708499, 708551, 712274, 712 34, G06F 738

Patent

active

059959924

ABSTRACT:
In a coprocessor which processes operands and issues a result word which may include overflow, result and truncation fields and which normally sets a truncation indicator if truncation is employed, the setting of the truncation indicator is inhibited under certain conditions to facilitate later handling of the result. Determinations are made as to whether the result and truncation fields of the result word are zero and as to whether the overflow field is non-zero. If the result and truncation fields are zero, the setting of the truncation indicator is inhibited notwithstanding a non-zero value in the overflow field. Break point position information is processed to obtain masks of bits having logic "1" values for testing the result and truncation fields and logic "0" values for testing the overflow field, the masks then being logically ANDed with the result word. If the result of the ANDing process is a logic "0", the truncation indicator is inhibited from being set.

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patent: 5892697 (1999-04-01), Brakefield

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