Conditional-carry adder for multibit digital computer

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G05F 750

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046758380

ABSTRACT:
A multibit digital adder is shown wherein a pair of carry generating circuitries is disposed between single adders for each bit in the digital numbers to be added, each one of such carry generating circuitries being responsive to a different carry-in signal and to the level of the bits applied to the associated single bit adder to produce the proper carry-in signal to the following single bit adder.

REFERENCES:
patent: 3100835 (1963-08-01), Bedrij
patent: 3437801 (1969-04-01), Wilhem, Jr.
patent: 4525797 (1985-06-01), Holden
patent: 4573137 (1986-02-01), Ohhashi
patent: 4623982 (1986-11-01), Ware
patent: 4639888 (1987-01-01), Nussbaecher
Bedrij, "Carry Select Adder", IRE Transactions on Electronic Computers, pp. 340-346, Jun. 1962.

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