Condensed microaddress generation in a complex instruction set c

Details Condensed microaddress generation in a complex instruction set c Condensed microaddress generation in a complex instruction set c

1995-03-01

1998-06-23

Harrell, Robert B.

G06F 1202

Patent

active

057713650

ABSTRACT:
A microarchitecture in a complex instruction computer system is disclosed employing a sparse microROM array and concatenation address circuitry for forming microaddress entry points, avoiding the need for a programmable logic array to translate instruction opcodes and avoiding duplicative entry points, thus minimizing the microROM array size.

REFERENCES:
patent: 5032983 (1991-07-01), Fu et al.
patent: 5390311 (1995-02-01), Fu et al.

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