Condensed memory matrix

Details Condensed memory matrix Condensed memory matrix

1997-08-11

1999-05-18

Saadat, Mahshid

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With provision for cooling the housing or its contents

257706, 257722, 257783, 257693, H01L23/10;23/34;23/48;23/54

Patent

active

059053054

ABSTRACT:
A condensed memory matrix is fabricated by conductively connecting the attachment bumps of a substrate with the attachment bumps of a wafer of DRAM chips and physically bonding the juxtaposed surfaces of the substrate and the wafer with a dielectric curable resin. An array of heat fins is bonded to the inactive surface of the wafer by a thermally conductive curable resin.

REFERENCES:
patent: 4190855 (1980-02-01), Inoue
patent: 4604644 (1986-08-01), Beckham et al.
patent: 5182632 (1993-01-01), Bechtel et al.
patent: 5214657 (1993-05-01), Farnworth et al.
patent: 5229647 (1993-07-01), Gnadinger
patent: 5249101 (1993-09-01), Frey et al.
Herbert Stopper, "Wafer-Scale Integration", pp. 354-364.
"Electronic Packaging and Interconnection Handbook", Chapter 7, pp. 7.24-7.27.

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