Concurrent sticky-bit detection and multiplication in a multipli

Details Concurrent sticky-bit detection and multiplication in a multipli Concurrent sticky-bit detection and multiplication in a multipli

1990-10-29

1992-05-12

Mai, Tan V.

Boots, shoes, and leggings

G06F 752

Patent

active

051133644

ABSTRACT:
An array multiplier calculates a Sticky-Bit concurrently with an iterative multiply operation using a predetermined number of multiplier arrays. An n-bit multiplicand operand provides a continuous input for each multiplier array. An n-bit multiplier operand is divided into a number of smaller sub-operands and each sub-operand is utilized for each cycle of the multiply operation. Each multiply cycle produces an intermediate accumulated partial product represented as sum and carry data, and a portion of the final product. The intermediate accumulated partial product is used as an input to a subsequent multiplier array for the following multiply cycle. A final accumulated partial product is summed in an adder to determine a completed product. During each cycle of the multiply operation, the Sticky-Bit detection logic detects and accumulates the Sticky-Bit concurrently with the multiply operation.

REFERENCES:
patent: 4864527 (1989-09-01), Peng et al.
patent: 4887232 (1987-12-01), Wolrich et al.
patent: 4893268 (1990-01-01), Denman
patent: 4928259 (1990-05-01), Galbi et al.

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